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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: StarFive JH7110 System Clock and Reset Generator8 9maintainers:10 - Emil Renner Berthing <kernel@esmil.dk>11 12properties:13 compatible:14 const: starfive,jh7110-syscrg15 16 reg:17 maxItems: 118 19 clocks:20 oneOf:21 - items:22 - description: Main Oscillator (24 MHz)23 - description: GMAC1 RMII reference or GMAC1 RGMII RX24 - description: External I2S TX bit clock25 - description: External I2S TX left/right channel clock26 - description: External I2S RX bit clock27 - description: External I2S RX left/right channel clock28 - description: External TDM clock29 - description: External audio master clock30 - description: PLL031 - description: PLL132 - description: PLL233 34 - items:35 - description: Main Oscillator (24 MHz)36 - description: GMAC1 RMII reference37 - description: GMAC1 RGMII RX38 - description: External I2S TX bit clock39 - description: External I2S TX left/right channel clock40 - description: External I2S RX bit clock41 - description: External I2S RX left/right channel clock42 - description: External TDM clock43 - description: External audio master clock44 - description: PLL045 - description: PLL146 - description: PLL247 48 clock-names:49 oneOf:50 - items:51 - const: osc52 - enum:53 - gmac1_rmii_refin54 - gmac1_rgmii_rxin55 - const: i2stx_bclk_ext56 - const: i2stx_lrck_ext57 - const: i2srx_bclk_ext58 - const: i2srx_lrck_ext59 - const: tdm_ext60 - const: mclk_ext61 - const: pll0_out62 - const: pll1_out63 - const: pll2_out64 65 - items:66 - const: osc67 - const: gmac1_rmii_refin68 - const: gmac1_rgmii_rxin69 - const: i2stx_bclk_ext70 - const: i2stx_lrck_ext71 - const: i2srx_bclk_ext72 - const: i2srx_lrck_ext73 - const: tdm_ext74 - const: mclk_ext75 - const: pll0_out76 - const: pll1_out77 - const: pll2_out78 79 '#clock-cells':80 const: 181 description:82 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.83 84 '#reset-cells':85 const: 186 description:87 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.88 89required:90 - compatible91 - reg92 - clocks93 - clock-names94 - '#clock-cells'95 - '#reset-cells'96 97additionalProperties: false98 99examples:100 - |101 clock-controller@13020000 {102 compatible = "starfive,jh7110-syscrg";103 reg = <0x13020000 0x10000>;104 clocks = <&osc>, <&gmac1_rmii_refin>,105 <&gmac1_rgmii_rxin>,106 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,107 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,108 <&tdm_ext>, <&mclk_ext>,109 <&pllclk 0>, <&pllclk 1>, <&pllclk 2>;110 clock-names = "osc", "gmac1_rmii_refin",111 "gmac1_rgmii_rxin",112 "i2stx_bclk_ext", "i2stx_lrck_ext",113 "i2srx_bclk_ext", "i2srx_lrck_ext",114 "tdm_ext", "mclk_ext",115 "pll0_out", "pll1_out", "pll2_out";116 #clock-cells = <1>;117 #reset-cells = <1>;118 };119