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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries3%YAML 1.24---5$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-aes.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator9 10maintainers:11 - Tudor Ambarus <tudor.ambarus@linaro.org>12 13properties:14 compatible:15 oneOf:16 - const: atmel,at91sam9g46-aes17 - items:18 - const: microchip,sam9x7-aes19 - const: atmel,at91sam9g46-aes20 21 reg:22 maxItems: 123 24 interrupts:25 maxItems: 126 27 clocks:28 maxItems: 129 30 clock-names:31 const: aes_clk32 33 dmas:34 items:35 - description: TX DMA Channel36 - description: RX DMA Channel37 38 dma-names:39 items:40 - const: tx41 - const: rx42 43required:44 - compatible45 - reg46 - interrupts47 - clocks48 - clock-names49 - dmas50 - dma-names51 52additionalProperties: false53 54examples:55 - |56 #include <dt-bindings/interrupt-controller/irq.h>57 #include <dt-bindings/interrupt-controller/arm-gic.h>58 #include <dt-bindings/clock/at91.h>59 #include <dt-bindings/dma/at91.h>60 61 aes: crypto@e1810000 {62 compatible = "atmel,at91sam9g46-aes";63 reg = <0xe1810000 0x100>;64 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;65 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;66 clock-names = "aes_clk";67 dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,68 <&dma0 AT91_XDMAC_DT_PERID(2)>;69 dma-names = "tx", "rx";70 };71