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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries3%YAML 1.24---5$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator9 10maintainers:11 - Tudor Ambarus <tudor.ambarus@linaro.org>12 13properties:14 compatible:15 oneOf:16 - const: atmel,at91sam9g46-sha17 - items:18 - const: microchip,sam9x7-sha19 - const: atmel,at91sam9g46-sha20 21 reg:22 maxItems: 123 24 interrupts:25 maxItems: 126 27 clocks:28 maxItems: 129 30 clock-names:31 const: sha_clk32 33 dmas:34 maxItems: 135 description: TX DMA Channel36 37 dma-names:38 const: tx39 40required:41 - compatible42 - reg43 - interrupts44 - clocks45 - clock-names46 47additionalProperties: false48 49examples:50 - |51 #include <dt-bindings/interrupt-controller/irq.h>52 #include <dt-bindings/interrupt-controller/arm-gic.h>53 #include <dt-bindings/clock/at91.h>54 #include <dt-bindings/dma/at91.h>55 56 sha: crypto@e1814000 {57 compatible = "atmel,at91sam9g46-sha";58 reg = <0xe1814000 0x100>;59 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;60 clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;61 clock-names = "sha_clk";62 dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;63 dma-names = "tx";64 };65