brintos

brintos / linux-shallow public Read only

0
0
Text · 2.0 KiB · ef07258 Raw
87 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Inside Secure SafeXcel cryptographic engine8 9maintainers:10  - Antoine Tenart <atenart@kernel.org>11 12properties:13  compatible:14    oneOf:15      - const: inside-secure,safexcel-eip197b16      - const: inside-secure,safexcel-eip197d17      - const: inside-secure,safexcel-eip97ies18      - const: inside-secure,safexcel-eip19719        description: Equivalent of inside-secure,safexcel-eip197b20        deprecated: true21      - const: inside-secure,safexcel-eip9722        description: Equivalent of inside-secure,safexcel-eip97ies23        deprecated: true24 25  reg:26    maxItems: 127 28  interrupts:29    maxItems: 630 31  interrupt-names:32    items:33      - const: ring034      - const: ring135      - const: ring236      - const: ring337      - const: eip38      - const: mem39 40  clocks:41    minItems: 142    maxItems: 243 44  clock-names:45    minItems: 146    items:47      - const: core48      - const: reg49 50required:51  - reg52  - interrupts53  - interrupt-names54 55allOf:56  - if:57      properties:58        clocks:59          minItems: 260    then:61      properties:62        clock-names:63          minItems: 264      required:65        - clock-names66 67additionalProperties: false68 69examples:70  - |71    #include <dt-bindings/interrupt-controller/arm-gic.h>72    #include <dt-bindings/interrupt-controller/irq.h>73 74    crypto@800000 {75        compatible = "inside-secure,safexcel-eip197b";76        reg = <0x800000 0x200000>;77        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,78                     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,79                     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,80                     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,81                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,82                     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;83        interrupt-names = "ring0", "ring1", "ring2", "ring3", "eip", "mem";84        clocks = <&cpm_syscon0 1 26>;85        clock-names = "core";86    };87