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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm crypto engine driver8 9maintainers:10  - Bhupesh Sharma <bhupesh.sharma@linaro.org>11 12description:13  This document defines the binding for the QCE crypto14  controller found on Qualcomm parts.15 16properties:17  compatible:18    oneOf:19      - const: qcom,crypto-v5.120        deprecated: true21        description: Kept only for ABI backward compatibility22 23      - const: qcom,crypto-v5.424        deprecated: true25        description: Kept only for ABI backward compatibility26 27      - items:28          - enum:29              - qcom,ipq4019-qce30              - qcom,sm8150-qce31          - const: qcom,qce32 33      - items:34          - enum:35              - qcom,ipq6018-qce36              - qcom,ipq8074-qce37              - qcom,ipq9574-qce38              - qcom,msm8996-qce39              - qcom,qcm2290-qce40              - qcom,sdm845-qce41              - qcom,sm6115-qce42          - const: qcom,ipq4019-qce43          - const: qcom,qce44 45      - items:46          - enum:47              - qcom,sc7280-qce48              - qcom,sm6350-qce49              - qcom,sm8250-qce50              - qcom,sm8350-qce51              - qcom,sm8450-qce52              - qcom,sm8550-qce53              - qcom,sm8650-qce54          - const: qcom,sm8150-qce55          - const: qcom,qce56 57  reg:58    maxItems: 159 60  clocks:61    minItems: 162    maxItems: 363 64  clock-names:65    minItems: 166    maxItems: 367 68  iommus:69    minItems: 170    maxItems: 871    description:72      phandle to apps_smmu node with sid mask.73 74  interconnects:75    maxItems: 176    description:77      Interconnect path between qce crypto and main memory.78 79  interconnect-names:80    const: memory81 82  dmas:83    items:84      - description: DMA specifiers for rx dma channel.85      - description: DMA specifiers for tx dma channel.86 87  dma-names:88    items:89      - const: rx90      - const: tx91 92allOf:93  - if:94      properties:95        compatible:96          contains:97            enum:98              - qcom,crypto-v5.199              - qcom,crypto-v5.4100              - qcom,ipq6018-qce101              - qcom,ipq8074-qce102              - qcom,ipq9574-qce103              - qcom,msm8996-qce104              - qcom,sdm845-qce105    then:106      properties:107        clocks:108          maxItems: 3109        clock-names:110          items:111            - const: iface112            - const: bus113            - const: core114      required:115        - clocks116        - clock-names117 118  - if:119      properties:120        compatible:121          contains:122            enum:123              - qcom,qcm2290-qce124              - qcom,sm6115-qce125    then:126      properties:127        clocks:128          maxItems: 1129        clock-names:130          items:131            - const: core132      required:133        - clocks134        - clock-names135 136  - if:137      properties:138        compatible:139          contains:140            enum:141              - qcom,sm8150-qce142    then:143      properties:144        clocks: false145        clock-names: false146 147required:148  - compatible149  - reg150  - dmas151  - dma-names152 153additionalProperties: false154 155examples:156  - |157    #include <dt-bindings/clock/qcom,gcc-apq8084.h>158    crypto-engine@fd45a000 {159        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";160        reg = <0xfd45a000 0x6000>;161        clocks = <&gcc GCC_CE2_AHB_CLK>,162                 <&gcc GCC_CE2_AXI_CLK>,163                 <&gcc GCC_CE2_CLK>;164        clock-names = "iface", "bus", "core";165        dmas = <&cryptobam 2>, <&cryptobam 3>;166        dma-names = "rx", "tx";167        iommus = <&apps_smmu 0x584 0x0011>,168                 <&apps_smmu 0x586 0x0011>,169                 <&apps_smmu 0x594 0x0011>,170                 <&apps_smmu 0x596 0x0011>;171    };172