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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A10 HDMI Controller8 9description: |10 The HDMI Encoder supports the HDMI video and audio outputs, and does11 CEC. It is one end of the pipeline.12 13maintainers:14 - Chen-Yu Tsai <wens@csie.org>15 - Maxime Ripard <mripard@kernel.org>16 17properties:18 compatible:19 oneOf:20 - const: allwinner,sun4i-a10-hdmi21 - const: allwinner,sun5i-a10s-hdmi22 - const: allwinner,sun6i-a31-hdmi23 - items:24 - const: allwinner,sun7i-a20-hdmi25 - const: allwinner,sun5i-a10s-hdmi26 27 reg:28 maxItems: 129 30 interrupts:31 maxItems: 132 33 clocks:34 oneOf:35 - items:36 - description: The HDMI interface clock37 - description: The HDMI module clock38 - description: The first video PLL39 - description: The second video PLL40 41 - items:42 - description: The HDMI interface clock43 - description: The HDMI module clock44 - description: The HDMI DDC clock45 - description: The first video PLL46 - description: The second video PLL47 48 clock-names:49 oneOf:50 - items:51 - const: ahb52 - const: mod53 - const: pll-054 - const: pll-155 56 - items:57 - const: ahb58 - const: mod59 - const: ddc60 - const: pll-061 - const: pll-162 63 resets:64 maxItems: 165 66 dmas:67 items:68 - description: DDC Transmission DMA Channel69 - description: DDC Reception DMA Channel70 - description: Audio Transmission DMA Channel71 72 dma-names:73 items:74 - const: ddc-tx75 - const: ddc-rx76 - const: audio-tx77 78 ports:79 $ref: /schemas/graph.yaml#/properties/ports80 81 properties:82 port@0:83 $ref: /schemas/graph.yaml#/properties/port84 description: |85 Input endpoints of the controller.86 87 port@1:88 $ref: /schemas/graph.yaml#/properties/port89 description: |90 Output endpoints of the controller. Usually an HDMI91 connector.92 93 required:94 - port@095 - port@196 97required:98 - compatible99 - reg100 - interrupts101 - clocks102 - clock-names103 - dmas104 - dma-names105 106if:107 properties:108 compatible:109 contains:110 const: allwinner,sun6i-a31-hdmi111 112then:113 properties:114 clocks:115 minItems: 5116 117 clock-names:118 minItems: 5119 120 required:121 - resets122 123additionalProperties: false124 125examples:126 - |127 #include <dt-bindings/clock/sun4i-a10-ccu.h>128 #include <dt-bindings/dma/sun4i-a10.h>129 #include <dt-bindings/reset/sun4i-a10-ccu.h>130 131 hdmi: hdmi@1c16000 {132 compatible = "allwinner,sun4i-a10-hdmi";133 reg = <0x01c16000 0x1000>;134 interrupts = <58>;135 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,136 <&ccu CLK_PLL_VIDEO0_2X>,137 <&ccu CLK_PLL_VIDEO1_2X>;138 clock-names = "ahb", "mod", "pll-0", "pll-1";139 dmas = <&dma SUN4I_DMA_NORMAL 16>,140 <&dma SUN4I_DMA_NORMAL 16>,141 <&dma SUN4I_DMA_DEDICATED 24>;142 dma-names = "ddc-tx", "ddc-rx", "audio-tx";143 144 ports {145 #address-cells = <1>;146 #size-cells = <0>;147 148 hdmi_in: port@0 {149 #address-cells = <1>;150 #size-cells = <0>;151 reg = <0>;152 153 hdmi_in_tcon0: endpoint@0 {154 reg = <0>;155 remote-endpoint = <&tcon0_out_hdmi>;156 };157 158 hdmi_in_tcon1: endpoint@1 {159 reg = <1>;160 remote-endpoint = <&tcon1_out_hdmi>;161 };162 };163 164 hdmi_out: port@1 {165 reg = <1>;166 };167 };168 };169 170...171