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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/bridge/chipone,icn6211.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge8 9maintainers:10 - Jagan Teki <jagan@amarulasolutions.com>11 12description: |13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.14 15 It has a flexible configuration of MIPI DSI signal input and16 produce RGB565, RGB666, RGB888 output format.17 18properties:19 compatible:20 enum:21 - chipone,icn621122 23 reg:24 maxItems: 125 description: virtual channel number of a DSI peripheral26 27 clock-names:28 const: refclk29 30 clocks:31 maxItems: 132 description: |33 Optional external clock connected to REF_CLK input.34 The clock rate must be in 10..154 MHz range.35 36 enable-gpios:37 description: Bridge EN pin, chip is reset when EN is low.38 39 vdd1-supply:40 description: A 1.8V/2.5V/3.3V supply that power the MIPI RX.41 42 vdd2-supply:43 description: A 1.8V/2.5V/3.3V supply that power the PLL.44 45 vdd3-supply:46 description: A 1.8V/2.5V/3.3V supply that power the RGB output.47 48 ports:49 $ref: /schemas/graph.yaml#/properties/ports50 51 properties:52 port@0:53 $ref: /schemas/graph.yaml#/$defs/port-base54 unevaluatedProperties: false55 description:56 Video port for MIPI DSI input57 58 properties:59 endpoint:60 $ref: /schemas/media/video-interfaces.yaml#61 unevaluatedProperties: false62 63 properties:64 data-lanes:65 description: array of physical DSI data lane indexes.66 minItems: 167 items:68 - const: 169 - const: 270 - const: 371 - const: 472 73 port@1:74 $ref: /schemas/graph.yaml#/properties/port75 description:76 Video port for MIPI DPI output (panel or connector).77 78 required:79 - port@180 81required:82 - compatible83 - reg84 - enable-gpios85 - ports86 87additionalProperties: false88 89examples:90 - |91 #include <dt-bindings/gpio/gpio.h>92 93 dsi {94 #address-cells = <1>;95 #size-cells = <0>;96 97 bridge@0 {98 compatible = "chipone,icn6211";99 reg = <0>;100 enable-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* LCD-RST: PL5 */101 102 ports {103 #address-cells = <1>;104 #size-cells = <0>;105 106 port@0 {107 reg = <0>;108 109 bridge_in_dsi: endpoint {110 remote-endpoint = <&dsi_out_bridge>;111 };112 };113 114 port@1 {115 reg = <1>;116 117 bridge_out_panel: endpoint {118 remote-endpoint = <&panel_out_bridge>;119 };120 };121 };122 };123 };124