109 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/display/bridge/sil,sii8620.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Silicon Image SiI8620 HDMI/MHL bridge8 9maintainers:10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>11 12properties:13 compatible:14 const: sil,sii862015 16 reg:17 maxItems: 118 19 clocks:20 maxItems: 121 22 clock-names:23 items:24 - const: xtal25 26 cvcc10-supply:27 description: Digital Core Supply Voltage (1.0V)28 29 interrupts:30 maxItems: 131 32 iovcc18-supply:33 description: I/O Supply Voltage (1.8V)34 35 reset-gpios:36 maxItems: 137 38 ports:39 $ref: /schemas/graph.yaml#/properties/ports40 unevaluatedProperties: false41 42 properties:43 port@0:44 $ref: /schemas/graph.yaml#/properties/port45 description:46 Video port for HDMI (encoder) input47 48 port@1:49 $ref: /schemas/graph.yaml#/properties/port50 description:51 MHL to connector port52 53 required:54 - port@055 - port@156 57required:58 - compatible59 - reg60 - clocks61 - cvcc10-supply62 - interrupts63 - iovcc18-supply64 - reset-gpios65 - ports66 67additionalProperties: false68 69examples:70 - |71 #include <dt-bindings/gpio/gpio.h>72 #include <dt-bindings/interrupt-controller/irq.h>73 74 i2c {75 #address-cells = <1>;76 #size-cells = <0>;77 78 bridge@39 {79 reg = <0x39>;80 compatible = "sil,sii8620";81 cvcc10-supply = <&ldo36_reg>;82 iovcc18-supply = <&ldo34_reg>;83 interrupt-parent = <&gpf0>;84 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;85 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;86 clocks = <&pmu_system_controller 0>;87 clock-names = "xtal";88 89 ports {90 #address-cells = <1>;91 #size-cells = <0>;92 93 port@0 {94 reg = <0>;95 mhl_to_hdmi: endpoint {96 remote-endpoint = <&hdmi_to_mhl>;97 };98 };99 100 port@1 {101 reg = <1>;102 mhl_to_musb_con: endpoint {103 remote-endpoint = <&musb_con_to_mhl>;104 };105 };106 };107 };108 };109