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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Silicon Image sii902x HDMI bridge8 9maintainers:10 - Boris Brezillon <bbrezillon@kernel.org>11 12properties:13 compatible:14 oneOf:15 - items:16 - enum:17 - sil,sii9022-cpi # CEC Programming Interface18 - sil,sii9022-tpi # Transmitter Programming Interface19 - const: sil,sii902220 - const: sil,sii902221 22 reg:23 maxItems: 124 25 interrupts:26 maxItems: 127 description: Interrupt line used to inform the host about hotplug events.28 29 reset-gpios:30 maxItems: 131 32 iovcc-supply:33 description: I/O Supply Voltage (1.8V or 3.3V)34 35 cvcc12-supply:36 description: Digital Core Supply Voltage (1.2V)37 38 '#sound-dai-cells':39 enum: [ 0, 1 ]40 description: |41 <0> if only I2S or S/PDIF pin is wired,42 <1> if both are wired.43 HDMI audio is configured only if this property is found.44 If HDMI audio is configured, the sii902x device becomes an I2S and/or45 S/PDIF audio codec component (e.g. a digital audio sink), that can be46 used in configuring full audio devices with simple-card or47 audio-graph-card bindings. See their binding documents on how to describe48 the way the49 sii902x device is connected to the rest of the audio system:50 Documentation/devicetree/bindings/sound/simple-card.yaml51 Documentation/devicetree/bindings/sound/audio-graph-card.yaml52 Note: In case of the audio-graph-card binding the used port index should53 be 3.54 55 sil,i2s-data-lanes:56 $ref: /schemas/types.yaml#/definitions/uint32-array57 minItems: 158 maxItems: 459 uniqueItems: true60 items:61 enum: [ 0, 1, 2, 3 ]62 description:63 Each integer indicates which I2S pin is connected to which audio FIFO.64 The first integer selects the I2S audio pin for the first audio FIFO#065 (HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so66 on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be67 connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be68 mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The69 default value is <0>, describing SD0 pin being routed to HDMI audio70 FIFO#0.71 72 clocks:73 maxItems: 174 description: MCLK input. MCLK can be used to produce HDMI audio CTS values.75 76 clock-names:77 const: mclk78 79 ports:80 $ref: /schemas/graph.yaml#/properties/ports81 82 properties:83 port@0:84 $ref: /schemas/graph.yaml#/properties/port85 description: Parallel RGB input port86 87 port@1:88 $ref: /schemas/graph.yaml#/properties/port89 description: HDMI output port90 91 port@3:92 $ref: /schemas/graph.yaml#/properties/port93 description: Sound input port94 95required:96 - compatible97 - reg98 99additionalProperties: false100 101examples:102 - |103 i2c {104 #address-cells = <1>;105 #size-cells = <0>;106 107 hdmi-bridge@39 {108 compatible = "sil,sii9022";109 reg = <0x39>;110 reset-gpios = <&pioA 1 0>;111 iovcc-supply = <&v3v3_hdmi>;112 cvcc12-supply = <&v1v2_hdmi>;113 114 #sound-dai-cells = <0>;115 sil,i2s-data-lanes = < 0 1 2 >;116 clocks = <&mclk>;117 clock-names = "mclk";118 119 ports {120 #address-cells = <1>;121 #size-cells = <0>;122 123 port@0 {124 reg = <0>;125 bridge_in: endpoint {126 remote-endpoint = <&dc_out>;127 };128 };129 };130 };131 };132