88 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/mediatek/mediatek,dither.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mediatek display dither processor8 9maintainers:10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>11 - Philipp Zabel <p.zabel@pengutronix.de>12 13description: |14 Mediatek display dither processor, namely DITHER, works by approximating15 unavailable colors with available colors and by mixing and matching available16 colors to mimic unavailable ones.17 DITHER device node must be siblings to the central MMSYS_CONFIG node.18 For a description of the MMSYS_CONFIG binding, see19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml20 for details.21 22properties:23 compatible:24 oneOf:25 - enum:26 - mediatek,mt8183-disp-dither27 - items:28 - enum:29 - mediatek,mt8186-disp-dither30 - mediatek,mt8188-disp-dither31 - mediatek,mt8192-disp-dither32 - mediatek,mt8195-disp-dither33 - mediatek,mt8365-disp-dither34 - const: mediatek,mt8183-disp-dither35 36 reg:37 maxItems: 138 39 interrupts:40 maxItems: 141 42 power-domains:43 description: A phandle and PM domain specifier as defined by bindings of44 the power controller specified by phandle. See45 Documentation/devicetree/bindings/power/power-domain.yaml for details.46 47 clocks:48 items:49 - description: DITHER Clock50 51 mediatek,gce-client-reg:52 description: The register of client driver can be configured by gce with53 4 arguments defined in this property, such as phandle of gce, subsys id,54 register offset and size. Each GCE subsys id is mapping to a client55 defined in the header include/dt-bindings/gce/<chip>-gce.h.56 $ref: /schemas/types.yaml#/definitions/phandle-array57 maxItems: 158 59required:60 - compatible61 - reg62 - interrupts63 - power-domains64 - clocks65 66additionalProperties: false67 68examples:69 - |70 #include <dt-bindings/interrupt-controller/arm-gic.h>71 #include <dt-bindings/clock/mt8183-clk.h>72 #include <dt-bindings/power/mt8183-power.h>73 #include <dt-bindings/gce/mt8183-gce.h>74 75 soc {76 #address-cells = <2>;77 #size-cells = <2>;78 79 dither0: dither@14012000 {80 compatible = "mediatek,mt8183-disp-dither";81 reg = <0 0x14012000 0 0x1000>;82 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>;83 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;84 clocks = <&mmsys CLK_MM_DISP_DITHER0>;85 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;86 };87 };88