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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: MediaTek DPI and DP_INTF Controller8 9maintainers:10 - CK Hu <ck.hu@mediatek.com>11 - Jitao shi <jitao.shi@mediatek.com>12 13description: |14 The MediaTek DPI and DP_INTF function blocks are a sink of the display15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a16 parallel output bus.17 18properties:19 compatible:20 oneOf:21 - enum:22 - mediatek,mt2701-dpi23 - mediatek,mt7623-dpi24 - mediatek,mt8173-dpi25 - mediatek,mt8183-dpi26 - mediatek,mt8186-dpi27 - mediatek,mt8188-dp-intf28 - mediatek,mt8192-dpi29 - mediatek,mt8195-dp-intf30 - items:31 - enum:32 - mediatek,mt6795-dpi33 - const: mediatek,mt8183-dpi34 - items:35 - enum:36 - mediatek,mt8365-dpi37 - const: mediatek,mt8192-dpi38 39 reg:40 maxItems: 141 42 interrupts:43 maxItems: 144 45 clocks:46 items:47 - description: Pixel Clock48 - description: Engine Clock49 - description: DPI PLL50 51 clock-names:52 items:53 - const: pixel54 - const: engine55 - const: pll56 57 pinctrl-0: true58 pinctrl-1: true59 60 pinctrl-names:61 items:62 - const: default63 - const: sleep64 65 power-domains:66 description: |67 The MediaTek DPI module is typically associated with one of the68 following multimedia power domains:69 POWER_DOMAIN_DISPLAY70 POWER_DOMAIN_VDOSYS71 POWER_DOMAIN_MM72 The specific power domain used varies depending on the SoC design.73 74 It is recommended to explicitly add the appropriate power domain75 property to the DPI node in the device tree.76 maxItems: 177 78 port:79 $ref: /schemas/graph.yaml#/properties/port80 description:81 Output port node. This port should be connected to the input port of an82 attached HDMI, LVDS or DisplayPort encoder chip.83 84required:85 - compatible86 - reg87 - interrupts88 - clocks89 - clock-names90 - port91 92additionalProperties: false93 94examples:95 - |96 #include <dt-bindings/interrupt-controller/arm-gic.h>97 #include <dt-bindings/clock/mt8173-clk.h>98 99 dpi0: dpi@1401d000 {100 compatible = "mediatek,mt8173-dpi";101 reg = <0x1401d000 0x1000>;102 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;103 clocks = <&mmsys CLK_MM_DPI_PIXEL>,104 <&mmsys CLK_MM_DPI_ENGINE>,105 <&apmixedsys CLK_APMIXED_TVDPLL>;106 clock-names = "pixel", "engine", "pll";107 pinctrl-names = "default", "sleep";108 pinctrl-0 = <&dpi_pin_func>;109 pinctrl-1 = <&dpi_pin_idle>;110 111 port {112 dpi0_out: endpoint {113 remote-endpoint = <&hdmi0_in>;114 };115 };116 };117 118...119