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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: MIPI DBI SPI Panel8 9maintainers:10 - Noralf Trønnes <noralf@tronnes.org>11 12description: |13 This binding is for display panels using a MIPI DBI compatible controller14 in SPI mode.15 16 The MIPI Alliance Standard for Display Bus Interface defines the electrical17 and logical interfaces for display controllers historically used in mobile18 phones. The standard defines 4 display architecture types and this binding is19 for type 1 which has full frame memory. There are 3 interface types in the20 standard and type C is the serial interface.21 22 The standard defines the following interface signals for type C:23 - Power:24 - Vdd: Power supply for display module25 Called power-supply in this binding.26 - Vddi: Logic level supply for interface signals27 Called io-supply in this binding.28 - Interface:29 - CSx: Chip select30 - SCL: Serial clock31 - Dout: Serial out32 - Din: Serial in33 - SDA: Bidrectional in/out34 - D/CX: Data/command selection, high=data, low=command35 Called dc-gpios in this binding.36 - RESX: Reset when low37 Called reset-gpios in this binding.38 39 The type C interface has 3 options:40 41 - Option 1: 9-bit mode and D/CX as the 9th bit42 | Command | the next command or following data |43 |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|44 45 - Option 2: 16-bit mode and D/CX as a 9th bit46 | Command or data |47 |<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|48 49 - Option 3: 8-bit mode and D/CX as a separate interface line50 | Command or data |51 |<D7><D6><D5><D4><D3><D2><D1><D0>|52 53 The standard defines one pixel format for type C: RGB111. The industry54 however has decided to provide the type A/B interface pixel formats also on55 the Type C interface and most common among these are RGB565 and RGB666.56 The MIPI DCS command set_address_mode (36h) has one bit that controls RGB/BGR57 order. This gives each supported RGB format a BGR variant.58 59 The panel resolution is specified using the panel-timing node properties60 hactive (width) and vactive (height). The other mandatory panel-timing61 properties should be set to zero except clock-frequency which can be62 optionally set to inform about the actual pixel clock frequency.63 64 If the panel is wired to the controller at an offset specify this using65 hback-porch (x-offset) and vback-porch (y-offset).66 67allOf:68 - $ref: panel-common.yaml#69 - $ref: /schemas/spi/spi-peripheral-props.yaml#70 71properties:72 compatible:73 items:74 - enum:75 - saef,sftc154b76 - sainsmart1877 - shineworld,lh133k78 - const: panel-mipi-dbi-spi79 80 reg:81 maxItems: 182 83 write-only:84 type: boolean85 description:86 Controller is not readable (ie. Din (MISO on the SPI interface) is not87 wired up).88 89 dc-gpios:90 maxItems: 191 description: |92 Controller data/command selection (D/CX) in 4-line SPI mode.93 If not set, the controller is in 3-line SPI mode.94 95 io-supply:96 description: |97 Logic level supply for interface signals (Vddi).98 No need to set if this is the same as power-supply.99 100 spi-3wire: true101 102 format:103 description: >104 Pixel format in bit order as going on the wire:105 * `x2r1g1b1r1g1b1` - RGB111, 2 pixels per byte106 * `x2b1g1r1b1g1r1` - BGR111, 2 pixels per byte107 * `x1r1g1b1x1r1g1b1` - RGB111, 2 pixels per byte108 * `x1b1g1r1x1b1g1r1` - BGR111, 2 pixels per byte109 * `r5g6b5` - RGB565, 2 bytes110 * `b5g6r5` - BGR565, 2 bytes111 * `r6x2g6x2b6x2` - RGB666, 3 bytes112 * `b6x2g6x2r6x2` - BGR666, 3 bytes113 enum:114 - x2r1g1b1r1g1b1115 - x2b1g1r1b1g1r1116 - x1r1g1b1x1r1g1b1117 - x1b1g1r1x1b1g1r1118 - r5g6b5119 - b5g6r5120 - r6x2g6x2b6x2121 - b6x2g6x2r6x2122 default: r5g6b5123 124required:125 - compatible126 - reg127 - width-mm128 - height-mm129 - panel-timing130 131unevaluatedProperties: false132 133examples:134 - |135 #include <dt-bindings/gpio/gpio.h>136 137 spi {138 #address-cells = <1>;139 #size-cells = <0>;140 141 display@0{142 compatible = "sainsmart18", "panel-mipi-dbi-spi";143 reg = <0>;144 spi-max-frequency = <40000000>;145 146 dc-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;147 reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;148 write-only;149 150 format = "r5g6b5";151 152 backlight = <&backlight>;153 154 width-mm = <35>;155 height-mm = <28>;156 157 panel-timing {158 hactive = <160>;159 vactive = <128>;160 hback-porch = <0>;161 vback-porch = <0>;162 clock-frequency = <0>;163 hfront-porch = <0>;164 hsync-len = <0>;165 vfront-porch = <0>;166 vsync-len = <0>;167 };168 };169 };170 171...172