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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: panel timing8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Sam Ravnborg <sam@ravnborg.org>12 13description: |14 There are different ways of describing the timing data of a panel. The15 devicetree representation corresponds to the one commonly found in datasheets16 for panels.17 18 The parameters are defined as seen in the following illustration.19 20 +-------+----------+-------------------------------------+----------+21 | | | ^ | |22 | | | |vsync_len | |23 | | | v | |24 +-------+----------+-------------------------------------+----------+25 | | | ^ | |26 | | | |vback_porch | |27 | | | v | |28 +-------+----------#######################################----------+29 | | # ^ # |30 | | # | # |31 | hsync | hback # | # hfront |32 | len | porch # | hactive # porch |33 |<----->|<-------->#<-------+--------------------------->#<-------->|34 | | # | # |35 | | # |vactive # |36 | | # | # |37 | | # v # |38 +-------+----------#######################################----------+39 | | | ^ | |40 | | | |vfront_porch | |41 | | | v | |42 +-------+----------+-------------------------------------+----------+43 44 45 The following is the panel timings shown with time on the x-axis.46 This matches the timing diagrams often found in data sheets.47 48 Active Front Sync Back49 Region Porch Porch50 <-----------------------><----------------><-------------><-------------->51 //////////////////////|52 ////////////////////// |53 ////////////////////// |.................. ................54 _______________55 56 Timing can be specified either as a typical value or as a tuple57 of min, typ, max values.58 59properties:60 61 clock-frequency:62 description: Panel clock in Hz63 64 hactive:65 $ref: /schemas/types.yaml#/definitions/uint3266 description: Horizontal panel resolution in pixels67 68 vactive:69 $ref: /schemas/types.yaml#/definitions/uint3270 description: Vertical panel resolution in pixels71 72 hfront-porch:73 description: Horizontal front porch panel timing74 $ref: /schemas/types.yaml#/definitions/uint32-array75 oneOf:76 - maxItems: 177 items:78 description: typical number of pixels79 - minItems: 380 maxItems: 381 items:82 description: min, typ, max number of pixels83 84 hback-porch:85 description: Horizontal back porch timing86 $ref: /schemas/types.yaml#/definitions/uint32-array87 oneOf:88 - maxItems: 189 items:90 description: typical number of pixels91 - minItems: 392 maxItems: 393 items:94 description: min, typ, max number of pixels95 96 hsync-len:97 description: Horizontal sync length panel timing98 $ref: /schemas/types.yaml#/definitions/uint32-array99 oneOf:100 - maxItems: 1101 items:102 description: typical number of pixels103 - minItems: 3104 maxItems: 3105 items:106 description: min, typ, max number of pixels107 108 vfront-porch:109 description: Vertical front porch panel timing110 $ref: /schemas/types.yaml#/definitions/uint32-array111 oneOf:112 - maxItems: 1113 items:114 description: typical number of lines115 - minItems: 3116 maxItems: 3117 items:118 description: min, typ, max number of lines119 120 vback-porch:121 description: Vertical back porch panel timing122 $ref: /schemas/types.yaml#/definitions/uint32-array123 oneOf:124 - maxItems: 1125 items:126 description: typical number of lines127 - minItems: 3128 maxItems: 3129 items:130 description: min, typ, max number of lines131 132 vsync-len:133 description: Vertical sync length panel timing134 $ref: /schemas/types.yaml#/definitions/uint32-array135 oneOf:136 - maxItems: 1137 items:138 description: typical number of lines139 - minItems: 3140 maxItems: 3141 items:142 description: min, typ, max number of lines143 144 hsync-active:145 description: |146 Horizontal sync pulse.147 0 selects active low, 1 selects active high.148 If omitted then it is not used by the hardware149 $ref: /schemas/types.yaml#/definitions/uint32150 enum: [0, 1]151 152 vsync-active:153 description: |154 Vertical sync pulse.155 0 selects active low, 1 selects active high.156 If omitted then it is not used by the hardware157 $ref: /schemas/types.yaml#/definitions/uint32158 enum: [0, 1]159 160 de-active:161 description: |162 Data enable.163 0 selects active low, 1 selects active high.164 If omitted then it is not used by the hardware165 $ref: /schemas/types.yaml#/definitions/uint32166 enum: [0, 1]167 168 pixelclk-active:169 description: |170 Data driving on rising or falling edge.171 Use 0 to drive pixel data on falling edge and172 sample data on rising edge.173 Use 1 to drive pixel data on rising edge and174 sample data on falling edge175 $ref: /schemas/types.yaml#/definitions/uint32176 enum: [0, 1]177 178 syncclk-active:179 description: |180 Drive sync on rising or sample sync on falling edge.181 If not specified then the setup is as specified by pixelclk-active.182 Use 0 to drive sync on falling edge and183 sample sync on rising edge of pixel clock.184 Use 1 to drive sync on rising edge and185 sample sync on falling edge of pixel clock186 $ref: /schemas/types.yaml#/definitions/uint32187 enum: [0, 1]188 189 interlaced:190 type: boolean191 description: Enable interlaced mode192 193 doublescan:194 type: boolean195 description: Enable double scan mode196 197 doubleclk:198 type: boolean199 description: Enable double clock mode200 201required:202 - clock-frequency203 - hactive204 - vactive205 - hfront-porch206 - hback-porch207 - hsync-len208 - vfront-porch209 - vback-porch210 - vsync-len211 212additionalProperties: false213 214...215