108 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/display/panel/samsung,ld9040.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus8 9maintainers:10 - Andrzej Hajda <a.hajda@samsung.com>11 12allOf:13 - $ref: panel-common.yaml#14 - $ref: /schemas/spi/spi-peripheral-props.yaml#15 16properties:17 compatible:18 const: samsung,ld904019 20 reg:21 maxItems: 122 23 display-timings: true24 port: true25 reset-gpios: true26 27 vdd3-supply:28 description: core voltage supply29 30 vci-supply:31 description: voltage supply for analog circuits32 33 power-on-delay:34 $ref: /schemas/types.yaml#/definitions/uint3235 description: delay after turning regulators on [ms]36 37 reset-delay:38 $ref: /schemas/types.yaml#/definitions/uint3239 description: delay after reset sequence [ms]40 41 panel-width-mm:42 description: physical panel width [mm]43 44 panel-height-mm:45 description: physical panel height [mm]46 47 spi-cpha: true48 spi-cpol: true49 50required:51 - compatible52 - reg53 - vdd3-supply54 - vci-supply55 - reset-gpios56 - display-timings57 58unevaluatedProperties: false59 60examples:61 - |62 spi {63 #address-cells = <1>;64 #size-cells = <0>;65 66 lcd@0 {67 compatible = "samsung,ld9040";68 69 reg = <0>;70 vdd3-supply = <&ldo7_reg>;71 vci-supply = <&ldo17_reg>;72 reset-gpios = <&gpy4 5 0>;73 spi-max-frequency = <1200000>;74 spi-cpol;75 spi-cpha;76 power-on-delay = <10>;77 reset-delay = <10>;78 panel-width-mm = <90>;79 panel-height-mm = <154>;80 81 display-timings {82 timing {83 clock-frequency = <23492370>;84 hactive = <480>;85 vactive = <800>;86 hback-porch = <16>;87 hfront-porch = <16>;88 vback-porch = <2>;89 vfront-porch = <28>;90 hsync-len = <2>;91 vsync-len = <1>;92 hsync-active = <0>;93 vsync-active = <0>;94 de-active = <0>;95 pixelclk-active = <0>;96 };97 };98 99 port {100 lcd_ep: endpoint {101 remote-endpoint = <&fimd_dpi_ep>;102 };103 };104 };105 };106 107...108