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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Rockchip specific extensions to the Synopsys Designware MIPI DSI8 9maintainers:10 - Sandy Huang <hjc@rock-chips.com>11 - Heiko Stuebner <heiko@sntech.de>12 13properties:14 compatible:15 items:16 - enum:17 - rockchip,px30-mipi-dsi18 - rockchip,rk3128-mipi-dsi19 - rockchip,rk3288-mipi-dsi20 - rockchip,rk3399-mipi-dsi21 - rockchip,rk3568-mipi-dsi22 - rockchip,rv1126-mipi-dsi23 - const: snps,dw-mipi-dsi24 25 interrupts:26 maxItems: 127 28 clocks:29 minItems: 130 maxItems: 431 32 clock-names:33 oneOf:34 - minItems: 235 items:36 - const: ref37 - const: pclk38 - const: phy_cfg39 - const: grf40 - const: pclk41 42 rockchip,grf:43 $ref: /schemas/types.yaml#/definitions/phandle44 description:45 This SoC uses GRF regs to switch between vopl/vopb.46 47 phys:48 maxItems: 149 50 phy-names:51 const: dphy52 53 "#phy-cells":54 const: 055 description:56 Defined when in use as ISP phy.57 58 power-domains:59 maxItems: 160 61 "#address-cells":62 const: 163 64 "#size-cells":65 const: 066 67required:68 - compatible69 - clocks70 - clock-names71 - rockchip,grf72 73allOf:74 - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml#75 - if:76 properties:77 compatible:78 contains:79 enum:80 - rockchip,px30-mipi-dsi81 - rockchip,rk3128-mipi-dsi82 - rockchip,rk3568-mipi-dsi83 - rockchip,rv1126-mipi-dsi84 85 then:86 properties:87 clocks:88 maxItems: 189 90 clock-names:91 maxItems: 192 93 required:94 - phys95 - phy-names96 97 - if:98 properties:99 compatible:100 contains:101 const: rockchip,rk3288-mipi-dsi102 103 then:104 properties:105 clocks:106 maxItems: 2107 108 clock-names:109 maxItems: 2110 111 - if:112 properties:113 compatible:114 contains:115 const: rockchip,rk3399-mipi-dsi116 117 then:118 properties:119 clocks:120 minItems: 4121 122 clock-names:123 minItems: 4124 125unevaluatedProperties: false126 127examples:128 - |129 #include <dt-bindings/clock/rk3288-cru.h>130 #include <dt-bindings/interrupt-controller/arm-gic.h>131 #include <dt-bindings/interrupt-controller/irq.h>132 133 mipi_dsi: dsi@ff960000 {134 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";135 reg = <0xff960000 0x4000>;136 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;137 clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;138 clock-names = "ref", "pclk";139 resets = <&cru SRST_MIPIDSI0>;140 reset-names = "apb";141 rockchip,grf = <&grf>;142 143 ports {144 #address-cells = <1>;145 #size-cells = <0>;146 147 mipi_in: port@0 {148 reg = <0>;149 #address-cells = <1>;150 #size-cells = <0>;151 152 mipi_in_vopb: endpoint@0 {153 reg = <0>;154 remote-endpoint = <&vopb_out_mipi>;155 };156 mipi_in_vopl: endpoint@1 {157 reg = <1>;158 remote-endpoint = <&vopl_out_mipi>;159 };160 };161 162 mipi_out: port@1 {163 reg = <1>;164 165 mipi_out_panel: endpoint {166 remote-endpoint = <&panel_in_mipi>;167 };168 };169 };170 };171