75 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra MIPI pad calibration controller8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13properties:14 $nodename:15 pattern: "^mipi@[0-9a-f]+$"16 17 compatible:18 enum:19 - nvidia,tegra114-mipi20 - nvidia,tegra210-mipi21 - nvidia,tegra186-mipi22 23 reg:24 maxItems: 125 26 clocks:27 items:28 - description: module clock29 30 clock-names:31 items:32 - const: mipi-cal33 34 power-domains:35 maxItems: 136 37 "#nvidia,mipi-calibrate-cells":38 description: The number of cells in a MIPI calibration specifier.39 Should be 1. The single cell specifies a bitmask of the pads that40 need to be calibrated for a given device.41 $ref: /schemas/types.yaml#/definitions/uint3242 const: 143 44additionalProperties: false45 46required:47 - compatible48 - reg49 - clocks50 - "#nvidia,mipi-calibrate-cells"51 52examples:53 - |54 #include <dt-bindings/clock/tegra114-car.h>55 56 mipi@700e3000 {57 compatible = "nvidia,tegra114-mipi";58 reg = <0x700e3000 0x100>;59 clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;60 clock-names = "mipi-cal";61 #nvidia,mipi-calibrate-cells = <1>;62 };63 64 dsia: dsi@54300000 {65 compatible = "nvidia,tegra114-dsi";66 reg = <0x54300000 0x00040000>;67 clocks = <&tegra_car TEGRA114_CLK_DSIA>,68 <&tegra_car TEGRA114_CLK_DSIALP>,69 <&tegra_car TEGRA114_CLK_PLL_D_OUT0>;70 clock-names = "dsi", "lp", "parent";71 resets = <&tegra_car 48>;72 reset-names = "dsi";73 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */74 };75