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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA 3D graphics engine8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13properties:14 $nodename:15 pattern: "^gr3d@[0-9a-f]+$"16 17 compatible:18 enum:19 - nvidia,tegra20-gr3d20 - nvidia,tegra30-gr3d21 - nvidia,tegra114-gr3d22 23 reg:24 maxItems: 125 26 clocks:27 minItems: 128 maxItems: 229 30 clock-names:31 minItems: 132 maxItems: 233 34 resets:35 minItems: 236 maxItems: 437 38 reset-names:39 minItems: 240 maxItems: 441 42 iommus:43 minItems: 144 maxItems: 245 46 interconnects:47 minItems: 448 maxItems: 1049 50 interconnect-names:51 minItems: 452 maxItems: 1053 54 operating-points-v2: true55 56 power-domains:57 minItems: 158 maxItems: 259 60 power-domain-names:61 maxItems: 262 63allOf:64 - if:65 properties:66 compatible:67 contains:68 const: nvidia,tegra20-gr2d69 then:70 properties:71 clocks:72 items:73 - description: module clock74 75 clock-names:76 items:77 - const: 3d78 79 resets:80 items:81 - description: module reset82 - description: memory client hotflush reset83 84 reset-names:85 items:86 - const: 3d87 - const: mc88 89 iommus:90 maxItems: 191 92 interconnects:93 minItems: 494 maxItems: 495 96 interconnect-names:97 minItems: 498 maxItems: 499 100 power-domains:101 items:102 - description: phandle to the TD power domain103 104 - if:105 properties:106 compatible:107 contains:108 const: nvidia,tegra30-gr3d109 then:110 properties:111 clocks:112 items:113 - description: primary module clock114 - description: secondary module clock115 116 clock-names:117 items:118 - const: 3d119 - const: 3d2120 121 resets:122 items:123 - description: primary module reset124 - description: secondary module reset125 - description: primary memory client hotflush reset126 - description: secondary memory client hotflush reset127 128 reset-names:129 items:130 - const: 3d131 - const: 3d2132 - const: mc133 - const: mc2134 135 iommus:136 minItems: 2137 maxItems: 2138 139 interconnects:140 minItems: 8141 maxItems: 8142 143 interconnect-names:144 minItems: 8145 maxItems: 8146 147 power-domains:148 items:149 - description: phandle to the TD power domain150 - description: phandle to the TD2 power domain151 152 power-domain-names:153 items:154 - const: 3d0155 - const: 3d1156 157 dependencies:158 power-domains: [ power-domain-names ]159 160 - if:161 properties:162 compatible:163 contains:164 const: nvidia,tegra114-gr2d165 then:166 properties:167 clocks:168 items:169 - description: module clock170 171 clock-names:172 items:173 - const: 3d174 175 resets:176 items:177 - description: module reset178 - description: memory client hotflush reset179 180 reset-names:181 items:182 - const: 3d183 - const: mc184 185 iommus:186 maxItems: 1187 188 interconnects:189 minItems: 10190 maxItems: 10191 192 interconnect-names:193 minItems: 10194 maxItems: 10195 196 power-domains:197 items:198 - description: phandle to the TD power domain199 200additionalProperties: false201 202examples:203 - |204 #include <dt-bindings/clock/tegra20-car.h>205 #include <dt-bindings/memory/tegra20-mc.h>206 207 gr3d@54180000 {208 compatible = "nvidia,tegra20-gr3d";209 reg = <0x54180000 0x00040000>;210 clocks = <&tegra_car TEGRA20_CLK_GR3D>;211 resets = <&tegra_car 24>, <&mc TEGRA20_MC_RESET_3D>;212 reset-names = "3d", "mc";213 };214