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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra TV Encoder Output8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13properties:14 $nodename:15 pattern: "^tvo@[0-9a-f]+$"16 17 compatible:18 enum:19 - nvidia,tegra20-tvo20 - nvidia,tegra30-tvo21 - nvidia,tegra114-tvo22 23 reg:24 maxItems: 125 26 interrupts:27 maxItems: 128 29 clocks:30 items:31 - description: module clock32 33 operating-points-v2: true34 35 power-domains:36 items:37 - description: phandle to the core power domain38 39additionalProperties: false40 41required:42 - compatible43 - reg44 - interrupts45 - clocks46 47examples:48 - |49 #include <dt-bindings/clock/tegra20-car.h>50 #include <dt-bindings/interrupt-controller/arm-gic.h>51 52 tvo@542c0000 {53 compatible = "nvidia,tegra20-tvo";54 reg = <0x542c0000 0x00040000>;55 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;56 clocks = <&tegra_car TEGRA20_CLK_TVO>;57 };58