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1Texas Instruments OMAP4 Display Subsystem2=========================================3 4See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic5description about OMAP Display Subsystem bindings.6 7DSS Core8--------9 10Required properties:11- compatible: "ti,omap4-dss"12- reg: address and length of the register space13- ti,hwmods: "dss_core"14- clocks: handle to fclk15- clock-names: "fck"16 17Required nodes:18- DISPC19 20Optional nodes:21- DSS Submodules: RFBI, VENC, DSI, HDMI22- Video port for DPI output23 24DPI Endpoint required properties:25- data-lines: number of lines used26 27 28DISPC29-----30 31Required properties:32- compatible: "ti,omap4-dispc"33- reg: address and length of the register space34- ti,hwmods: "dss_dispc"35- interrupts: the DISPC interrupt36- clocks: handle to fclk37- clock-names: "fck"38 39Optional properties:40- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit41 in bytes per second42 43 44RFBI45----46 47Required properties:48- compatible: "ti,omap4-rfbi"49- reg: address and length of the register space50- ti,hwmods: "dss_rfbi"51- clocks: handles to fclk and iclk52- clock-names: "fck", "ick"53 54Optional nodes:55- Video port for RFBI output56- RFBI controlled peripherals57 58 59VENC60----61 62Required properties:63- compatible: "ti,omap4-venc"64- reg: address and length of the register space65- ti,hwmods: "dss_venc"66- vdda-supply: power supply for DAC67- clocks: handle to fclk68- clock-names: "fck"69 70Optional nodes:71- Video port for VENC output72 73VENC Endpoint required properties:74- ti,invert-polarity: invert the polarity of the video signal75- ti,channels: 1 for composite, 2 for s-video76 77 78DSI79---80 81Required properties:82- compatible: "ti,omap4-dsi"83- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'84- reg-names: "proto", "phy", "pll"85- interrupts: the DSI interrupt line86- ti,hwmods: "dss_dsi1" or "dss_dsi2"87- vdd-supply: power supply for DSI88- clocks: handles to fclk and pll clock89- clock-names: "fck", "sys_clk"90 91Optional nodes:92- Video port for DSI output93- DSI controlled peripherals94 95DSI Endpoint required properties:96- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,97 DATA1+, DATA1-, ...98 99 100HDMI101----102 103Required properties:104- compatible: "ti,omap4-hdmi"105- reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',106 'core'107- reg-names: "wp", "pll", "phy", "core"108- interrupts: the HDMI interrupt line109- ti,hwmods: "dss_hdmi"110- vdda-supply: vdda power supply111- clocks: handles to fclk and pll clock112- clock-names: "fck", "sys_clk"113 114Optional nodes:115- Video port for HDMI output116 117HDMI Endpoint optional properties:118- lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,119 D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)120