100 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Ingenic SoCs DMA Controller8 9maintainers:10 - Paul Cercueil <paul@crapouillou.net>11 12allOf:13 - $ref: dma-controller.yaml#14 15properties:16 compatible:17 oneOf:18 - enum:19 - ingenic,jz4740-dma20 - ingenic,jz4725b-dma21 - ingenic,jz4755-dma22 - ingenic,jz4760-dma23 - ingenic,jz4760-bdma24 - ingenic,jz4760-mdma25 - ingenic,jz4760b-dma26 - ingenic,jz4760b-bdma27 - ingenic,jz4760b-mdma28 - ingenic,jz4770-dma29 - ingenic,jz4780-dma30 - ingenic,x1000-dma31 - ingenic,x1830-dma32 - items:33 - const: ingenic,jz4770-bdma34 - const: ingenic,jz4760b-bdma35 36 reg:37 items:38 - description: Channel-specific registers39 - description: System control registers40 41 interrupts:42 maxItems: 143 44 clocks:45 maxItems: 146 47 "#dma-cells":48 enum: [2, 3]49 description: >50 DMA clients must use the format described in dma.txt, giving a phandle51 to the DMA controller plus the following integer cells:52 53 - Request type: The DMA request type specifies the device endpoint that54 will be the source or destination of the DMA transfer.55 If "#dma-cells" is 2, the request type is a single cell, and the56 direction will be unidirectional (either RX or TX but not both).57 If "#dma-cells" is 3, the request type has two cells; the first58 one corresponds to the host to device direction (TX), the second one59 corresponds to the device to host direction (RX). The DMA channel is60 then bidirectional.61 62 - Channel: If set to 0xffffffff, any available channel will be allocated63 for the client. Otherwise, the exact channel specified will be used.64 The channel should be reserved on the DMA controller using the65 ingenic,reserved-channels property.66 67 ingenic,reserved-channels:68 $ref: /schemas/types.yaml#/definitions/uint3269 description: >70 Bitmask of channels to reserve for devices that need a specific71 channel. These channels will only be assigned when explicitly72 requested by a client. The primary use for this is channels 0 and73 1, which can be configured to have special behaviour for NAND/BCH74 when using programmable firmware.75 76required:77 - compatible78 - reg79 - interrupts80 - clocks81 82unevaluatedProperties: false83 84examples:85 - |86 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>87 dma: dma-controller@13420000 {88 compatible = "ingenic,jz4780-dma";89 reg = <0x13420000 0x400>, <0x13421000 0x40>;90 91 interrupt-parent = <&intc>;92 interrupts = <10>;93 94 clocks = <&cgu JZ4780_CLK_PDMA>;95 96 #dma-cells = <2>;97 98 ingenic,reserved-channels = <0x3>;99 };100