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1* NVIDIA Tegra APB DMA controller2 3Required properties:4- compatible: Should be "nvidia,<chip>-apbdma"5- reg: Should contain DMA registers location and length. This should include6 all of the per-channel registers.7- interrupts: Should contain all of the per-channel DMA interrupts.8- clocks: Must contain one entry, for the module clock.9 See ../clocks/clock-bindings.txt for details.10- resets : Must contain an entry for each entry in reset-names.11 See ../reset/reset.txt for details.12- reset-names : Must include the following entries:13 - dma14- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in15 client nodes' dmas properties. The specifier represents the DMA request16 select value for the peripheral. For more details, consult the Tegra TRM's17 documentation of the APB DMA channel control register REQ_SEL field.18 19Examples:20 21apbdma: dma@6000a000 {22 compatible = "nvidia,tegra20-apbdma";23 reg = <0x6000a000 0x1200>;24 interrupts = < 0 136 0x0425 0 137 0x0426 0 138 0x0427 0 139 0x0428 0 140 0x0429 0 141 0x0430 0 142 0x0431 0 143 0x0432 0 144 0x0433 0 145 0x0434 0 146 0x0435 0 147 0x0436 0 148 0x0437 0 149 0x0438 0 150 0x0439 0 151 0x04 >;40 clocks = <&tegra_car 34>;41 resets = <&tegra_car 34>;42 reset-names = "dma";43 #dma-cells = <1>;44};45