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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra Audio DMA (ADMA) controller8 9description: |10 The Tegra Audio DMA controller is used for transferring data11 between system memory and the Audio Processing Engine (APE).12 13maintainers:14 - Jon Hunter <jonathanh@nvidia.com>15 16allOf:17 - $ref: dma-controller.yaml#18 19properties:20 compatible:21 oneOf:22 - enum:23 - nvidia,tegra210-adma24 - nvidia,tegra186-adma25 - items:26 - enum:27 - nvidia,tegra234-adma28 - nvidia,tegra194-adma29 - const: nvidia,tegra186-adma30 31 reg:32 maxItems: 133 34 interrupts:35 description: |36 Should contain all of the per-channel DMA interrupts in37 ascending order with respect to the DMA channel index.38 minItems: 139 maxItems: 3240 41 clocks:42 description: Must contain one entry for the ADMA module clock43 maxItems: 144 45 clock-names:46 const: d_audio47 48 "#dma-cells":49 description: |50 The first cell denotes the receive/transmit request number and51 should be between 1 and the maximum number of requests supported.52 This value corresponds to the RX/TX_REQUEST_SELECT fields in the53 ADMA_CHn_CTRL register.54 const: 155 56 dma-channel-mask:57 maxItems: 158 59required:60 - compatible61 - reg62 - interrupts63 - clocks64 - clock-names65 66additionalProperties: false67 68examples:69 - |70 #include <dt-bindings/interrupt-controller/arm-gic.h>71 #include<dt-bindings/clock/tegra210-car.h>72 73 dma-controller@702e2000 {74 compatible = "nvidia,tegra210-adma";75 reg = <0x702e2000 0x2000>;76 interrupt-parent = <&tegra_agic>;77 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,78 <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,79 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,80 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,81 <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,82 <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,83 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,84 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,85 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,86 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,87 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,88 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,89 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,90 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,91 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,92 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,93 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,94 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,95 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,96 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,97 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,98 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;99 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;100 clock-names = "d_audio";101 #dma-cells = <1>;102 };103 104...105