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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/dma/owl-dma.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Actions Semi Owl SoCs DMA controller8 9description: |10 The OWL DMA is a general-purpose direct memory access controller capable of11 supporting 10 independent DMA channels for the Actions Semi S700 SoC and 1212 independent DMA channels for the S500 and S900 SoC variants.13 14maintainers:15 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>16 17allOf:18 - $ref: dma-controller.yaml#19 20properties:21 compatible:22 enum:23 - actions,s500-dma24 - actions,s700-dma25 - actions,s900-dma26 27 reg:28 maxItems: 129 30 interrupts:31 description:32 controller supports 4 interrupts, which are freely assignable to the33 DMA channels.34 maxItems: 435 36 "#dma-cells":37 const: 138 39 dma-channels:40 maximum: 1241 42 dma-requests:43 maximum: 4644 45 clocks:46 maxItems: 147 description:48 Phandle and Specifier of the clock feeding the DMA controller.49 50 power-domains:51 maxItems: 152 53required:54 - compatible55 - reg56 - interrupts57 - "#dma-cells"58 - dma-channels59 - dma-requests60 - clocks61 62unevaluatedProperties: false63 64examples:65 - |66 #include <dt-bindings/interrupt-controller/arm-gic.h>67 dma: dma-controller@e0260000 {68 compatible = "actions,s900-dma";69 reg = <0xe0260000 0x1000>;70 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,71 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,72 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,73 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;74 #dma-cells = <1>;75 dma-channels = <12>;76 dma-requests = <46>;77 clocks = <&clock 22>;78 };79 80...81