brintos

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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/dma/sprd,sc9860-dma.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Spreadtrum SC9860 DMA controller8 9description: |10  There are three DMA controllers: AP DMA, AON DMA and AGCP DMA. For AGCP11  DMA controller, it can or do not request the IRQ, which will save12  system power without resuming system by DMA interrupts if AGCP DMA13  does not request the IRQ.14 15maintainers:16  - Orson Zhai <orsonzhai@gmail.com>17  - Baolin Wang <baolin.wang7@gmail.com>18  - Chunyan Zhang <zhang.lyra@gmail.com>19 20properties:21  compatible:22    const: sprd,sc9860-dma23 24  reg:25    maxItems: 126 27  interrupts:28    maxItems: 129 30  clocks:31    minItems: 132    items:33      - description: DMA enable clock34      - description: optional ashb_eb clock, only for the AGCP DMA controller35 36  clock-names:37    minItems: 138    items:39      - const: enable40      - const: ashb_eb41 42  '#dma-cells':43    const: 144 45  dma-channels:46    const: 3247 48  '#dma-channels':49    const: 3250    deprecated: true51 52required:53  - compatible54  - reg55  - clocks56  - clock-names57  - '#dma-cells'58  - dma-channels59 60allOf:61  - $ref: dma-controller.yaml#62 63unevaluatedProperties: false64 65examples:66  - |67    #include <dt-bindings/clock/sprd,sc9860-clk.h>68    #include <dt-bindings/interrupt-controller/arm-gic.h>69    #include <dt-bindings/interrupt-controller/irq.h>70 71    /* AP DMA controller */72    dma-controller@20100000 {73      compatible = "sprd,sc9860-dma";74      reg = <0x20100000 0x4000>;75      interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;76      clocks = <&apahb_gate CLK_DMA_EB>;77      clock-names = "enable";78      #dma-cells = <1>;79      dma-channels = <32>;80    };81 82    /* AGCP DMA controller */83    dma-controller@41580000 {84      compatible = "sprd,sc9860-dma";85      reg = <0x41580000 0x4000>;86      clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,87               <&agcp_gate CLK_AGCP_AP_ASHB_EB>;88      clock-names = "enable", "ashb_eb";89      #dma-cells = <1>;90      dma-channels = <32>;91    };92...93