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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mediatek mt8195 DSP core8 9maintainers:10 - YC Hung <yc.hung@mediatek.com>11 12description: |13 Some boards from mt8195 contain a DSP core used for14 advanced pre- and post- audio processing.15 16properties:17 compatible:18 const: mediatek,mt8195-dsp19 20 reg:21 items:22 - description: Address and size of the DSP Cfg registers23 - description: Address and size of the DSP SRAM24 25 reg-names:26 items:27 - const: cfg28 - const: sram29 30 clocks:31 items:32 - description: mux for audio dsp clock33 - description: 26M clock34 - description: mux for audio dsp local bus35 - description: default audio dsp local bus clock source36 - description: clock gate for audio dsp clock37 - description: mux for audio dsp access external bus38 39 clock-names:40 items:41 - const: adsp_sel42 - const: clk26m_ck43 - const: audio_local_bus44 - const: mainpll_d7_d245 - const: scp_adsp_audiodsp46 - const: audio_h47 48 power-domains:49 maxItems: 150 51 mboxes:52 items:53 - description: mailbox for receiving audio DSP requests.54 - description: mailbox for transmitting requests to audio DSP.55 56 mbox-names:57 items:58 - const: rx59 - const: tx60 61 memory-region:62 items:63 - description: dma buffer between host and DSP.64 - description: DSP system memory.65 66required:67 - compatible68 - reg69 - reg-names70 - clocks71 - clock-names72 - memory-region73 - power-domains74 - mbox-names75 - mboxes76 77additionalProperties: false78 79examples:80 - |81 #include <dt-bindings/interrupt-controller/arm-gic.h>82 #include <dt-bindings/interrupt-controller/irq.h>83 dsp@10803000 {84 compatible = "mediatek,mt8195-dsp";85 reg = <0x10803000 0x1000>,86 <0x10840000 0x40000>;87 reg-names = "cfg", "sram";88 clocks = <&topckgen 10>, //CLK_TOP_ADSP89 <&clk26m>,90 <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS91 <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D292 <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP93 <&topckgen 34>; //CLK_TOP_AUDIO_H94 clock-names = "adsp_sel",95 "clk26m_ck",96 "audio_local_bus",97 "mainpll_d7_d2",98 "scp_adsp_audiodsp",99 "audio_h";100 memory-region = <&adsp_dma_mem_reserved>,101 <&adsp_mem_reserved>;102 power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP103 mbox-names = "rx", "tx";104 mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;105 };106