42 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Altera Freeze Bridge Controller8 9description:10 The Altera Freeze Bridge Controller manages one or more freeze bridges.11 The controller can freeze/disable the bridges which prevents signal12 changes from passing through the bridge. The controller can also13 unfreeze/enable the bridges which allows traffic to pass through the bridge14 normally.15 16maintainers:17 - Xu Yilun <yilun.xu@intel.com>18 19allOf:20 - $ref: fpga-bridge.yaml#21 22properties:23 compatible:24 const: altr,freeze-bridge-controller25 26 reg:27 maxItems: 128 29required:30 - compatible31 - reg32 33unevaluatedProperties: false34 35examples:36 - |37 fpga-bridge@100000450 {38 compatible = "altr,freeze-bridge-controller";39 reg = <0x1000 0x10>;40 bridge-enable = <0>;41 };42