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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore8 9maintainers:10 - Nava kishore Manne <nava.kishore.manne@amd.com>11 12allOf:13 - $ref: fpga-bridge.yaml#14 15description: |16 The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more17 decouplers/fpga bridges. The controller can decouple/disable the bridges18 which prevents signal changes from passing through the bridge. The controller19 can also couple / enable the bridges which allows traffic to pass through the20 bridge normally.21 Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore22 is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function23 eXchange AXI shutdown manager prevents AXI traffic from passing through the24 bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a25 Reconfigurable Partition when it is undergoing dynamic reconfiguration,26 preventing the system deadlock that can occur if AXI transactions are27 interrupted by DFX.28 Please refer to fpga-region.txt and fpga-bridge.txt in this directory for29 common binding part and usage.30 31properties:32 compatible:33 oneOf:34 - items:35 - const: xlnx,pr-decoupler-1.0036 - const: xlnx,pr-decoupler37 - items:38 - const: xlnx,dfx-axi-shutdown-manager-1.0039 - const: xlnx,dfx-axi-shutdown-manager40 41 reg:42 maxItems: 143 44 clocks:45 maxItems: 146 47 clock-names:48 items:49 - const: aclk50 51required:52 - compatible53 - reg54 - clocks55 - clock-names56 57unevaluatedProperties: false58 59examples:60 - |61 fpga-bridge@100000450 {62 compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler";63 reg = <0x10000045 0x10>;64 clocks = <&clkc 15>;65 clock-names = "aclk";66 };67...68