88 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Aspeed SGPIO controller8 9maintainers:10 - Andrew Jeffery <andrew@aj.id.au>11 12description:13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial16 GPIO pins can be programmed to support the following options17 - Support interrupt option for each input port and various interrupt18 sensitivity option (level-high, level-low, edge-high, edge-low)19 - Support reset tolerance option for each output port20 - Directly connected to APB bus and its shift clock is from APB bus clock21 divided by a programmable value.22 - Co-work with external signal-chained TTL components (74LV165/74LV595)23 24properties:25 compatible:26 enum:27 - aspeed,ast2400-sgpio28 - aspeed,ast2500-sgpio29 - aspeed,ast2600-sgpiom30 31 reg:32 maxItems: 133 34 gpio-controller: true35 36 # Each SGPIO is represented as a pair of input and output GPIOs37 gpio-line-names:38 minItems: 16039 maxItems: 25640 41 '#gpio-cells':42 const: 243 44 interrupts:45 maxItems: 146 47 interrupt-controller: true48 49 '#interrupt-cells':50 const: 251 52 clocks:53 maxItems: 154 55 ngpios: true56 57 bus-frequency: true58 59required:60 - compatible61 - reg62 - gpio-controller63 - '#gpio-cells'64 - interrupts65 - interrupt-controller66 - '#interrupt-cells'67 - ngpios68 - clocks69 - bus-frequency70 71additionalProperties: false72 73examples:74 - |75 #include <dt-bindings/clock/aspeed-clock.h>76 sgpio: sgpio@1e780200 {77 #gpio-cells = <2>;78 compatible = "aspeed,ast2500-sgpio";79 gpio-controller;80 interrupts = <40>;81 reg = <0x1e780200 0x0100>;82 clocks = <&syscon ASPEED_CLK_APB>;83 interrupt-controller;84 #interrupt-cells = <2>;85 ngpios = <80>;86 bus-frequency = <12000000>;87 };88