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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/gpio/brcm,kona-gpio.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Broadcom Kona family GPIO controller8 9description:10 The Broadcom GPIO Controller IP can be configured prior to synthesis to11 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The12 GPIO controller only supports edge, not level, triggering of interrupts.13 14maintainers:15 - Ray Jui <rjui@broadcom.com>16 17properties:18 compatible:19 items:20 - enum:21 - brcm,bcm11351-gpio22 - brcm,bcm21664-gpio23 - brcm,bcm23550-gpio24 - const: brcm,kona-gpio25 26 reg:27 maxItems: 128 29 interrupts:30 minItems: 431 maxItems: 632 description:33 The interrupt outputs from the controller. There is one GPIO interrupt34 per GPIO bank. The number of interrupts listed depends on the number of35 GPIO banks on the SoC. The interrupts must be ordered by bank, starting36 with bank 0. There is always a 1:1 mapping between banks and IRQs.37 38 '#gpio-cells':39 const: 240 41 '#interrupt-cells':42 const: 243 44 gpio-controller: true45 46 interrupt-controller: true47 48required:49 - compatible50 - reg51 - interrupts52 - '#gpio-cells'53 - '#interrupt-cells'54 - gpio-controller55 - interrupt-controller56 57allOf:58 - if:59 properties:60 compatible:61 contains:62 const: brcm,bcm11351-gpio63 then:64 properties:65 interrupts:66 minItems: 667 - if:68 properties:69 compatible:70 contains:71 enum:72 - brcm,bcm21664-gpio73 - brcm,bcm23550-gpio74 then:75 properties:76 interrupts:77 maxItems: 478 79additionalProperties: false80 81examples:82 - |83 #include <dt-bindings/interrupt-controller/arm-gic.h>84 #include <dt-bindings/interrupt-controller/irq.h>85 86 gpio@35003000 {87 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";88 reg = <0x35003000 0x800>;89 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,90 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,91 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,92 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,93 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,94 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;95 #gpio-cells = <2>;96 #interrupt-cells = <2>;97 gpio-controller;98 interrupt-controller;99 };100...101