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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mediatek MT7621 SoC GPIO controller8 9maintainers:10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>11 12description: |13 The IP core used inside these SoCs has 3 banks of 32 GPIOs each.14 The registers of all the banks are interwoven inside one single IO range.15 We load one GPIO controller instance per bank. Also the GPIO controller can receive16 interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU17 using GIC INT12.18 19properties:20 $nodename:21 pattern: "^gpio@[0-9a-f]+$"22 23 compatible:24 const: mediatek,mt7621-gpio25 26 reg:27 maxItems: 128 29 "#gpio-cells":30 const: 231 32 gpio-controller: true33 gpio-ranges: true34 35 interrupt-controller: true36 37 "#interrupt-cells":38 const: 239 40 interrupts:41 maxItems: 142 43required:44 - compatible45 - reg46 - "#gpio-cells"47 - gpio-controller48 - gpio-ranges49 - interrupt-controller50 - "#interrupt-cells"51 - interrupts52 53additionalProperties: false54 55examples:56 - |57 #include <dt-bindings/gpio/gpio.h>58 #include <dt-bindings/interrupt-controller/mips-gic.h>59 60 gpio@600 {61 compatible = "mediatek,mt7621-gpio";62 reg = <0x600 0x100>;63 #gpio-cells = <2>;64 gpio-controller;65 gpio-ranges = <&pinctrl 0 0 95>;66 interrupt-controller;67 #interrupt-cells = <2>;68 interrupt-parent = <&gic>;69 interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;70 };71 72...73