102 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: UniPhier GPIO controller8 9maintainers:10 - Masahiro Yamada <yamada.masahiro@socionext.com>11 12properties:13 $nodename:14 pattern: "^gpio@[0-9a-f]+$"15 16 compatible:17 const: socionext,uniphier-gpio18 19 reg:20 maxItems: 121 22 gpio-controller: true23 24 "#gpio-cells":25 const: 226 27 interrupt-controller: true28 29 "#interrupt-cells":30 description: |31 The first cell defines the interrupt number.32 The second cell bits[3:0] is used to specify trigger type as follows:33 1 = low-to-high edge triggered34 2 = high-to-low edge triggered35 4 = active high level-sensitive36 8 = active low level-sensitive37 Valid combinations are 1, 2, 3, 4, 8.38 const: 239 40 ngpios:41 minimum: 042 maximum: 51243 44 gpio-ranges: true45 46 gpio-ranges-group-names: true47 48 socionext,interrupt-ranges:49 description: |50 Specifies an interrupt number mapping between this GPIO controller and51 its interrupt parent, in the form of arbitrary number of52 <child-interrupt-base parent-interrupt-base length> triplets.53 $ref: /schemas/types.yaml#/definitions/uint32-matrix54 55patternProperties:56 "^.+-hog(-[0-9]+)?$":57 type: object58 required:59 - gpio-hog60 61required:62 - compatible63 - reg64 - gpio-controller65 - "#gpio-cells"66 - interrupt-controller67 - "#interrupt-cells"68 - ngpios69 - gpio-ranges70 - socionext,interrupt-ranges71 72additionalProperties: false73 74examples:75 - |76 #include <dt-bindings/gpio/gpio.h>77 #include <dt-bindings/gpio/uniphier-gpio.h>78 79 gpio: gpio@55000000 {80 compatible = "socionext,uniphier-gpio";81 reg = <0x55000000 0x200>;82 interrupt-parent = <&aidet>;83 interrupt-controller;84 #interrupt-cells = <2>;85 gpio-controller;86 #gpio-cells = <2>;87 gpio-ranges = <&pinctrl 0 0 0>;88 gpio-ranges-group-names = "gpio_range";89 ngpios = <248>;90 socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;91 };92 93 // Consumer:94 // Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC95 // document. Unfortunately, only the one's place is octal in the port96 // numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.)97 // UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.98 sdhci0_pwrseq {99 compatible = "mmc-pwrseq-emmc";100 reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>;101 };102