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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright 2022 Unisoc Inc.3%YAML 1.24---5$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Unisoc EIC controller9 10maintainers:11 - Orson Zhai <orsonzhai@gmail.com>12 - Baolin Wang <baolin.wang7@gmail.com>13 - Chunyan Zhang <zhang.lyra@gmail.com>14 15description: |16 The EIC is the abbreviation of external interrupt controller, which can17 be used only in input mode. The Spreadtrum platform has 2 EIC controllers,18 one is in digital chip, and another one is in PMIC. The digital chip EIC19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-21 module.22 23 The EIC-debounce sub-module provides up to 8 source input signal24 connections. A debounce mechanism is used to capture the input signals'25 stable status (millisecond resolution) and a single-trigger mechanism26 is introduced into this sub-module to enhance the input event detection27 reliability. In addition, this sub-module's clock can be shut off28 automatically to reduce power dissipation. Moreover the debounce range29 is from 1ms to 4s with a step size of 1ms. The input signal will be30 ignored if it is asserted for less than 1 ms.31 32 The EIC-latch sub-module is used to latch some special power down signals33 and generate interrupts, since the EIC-latch does not depend on the APB34 clock to capture signals.35 36 The EIC-async sub-module uses a 32kHz clock to capture the short signals37 (microsecond resolution) to generate interrupts by level or edge trigger.38 39 The EIC-sync is similar with GPIO's input function, which is a synchronized40 signal input register. It can generate interrupts by level or edge trigger41 when detecting input signals.42 43properties:44 compatible:45 oneOf:46 - enum:47 - sprd,sc9860-eic-debounce48 - sprd,sc9860-eic-latch49 - sprd,sc9860-eic-async50 - sprd,sc9860-eic-sync51 - sprd,sc2731-eic52 - items:53 - enum:54 - sprd,ums512-eic-debounce55 - const: sprd,sc9860-eic-debounce56 - items:57 - enum:58 - sprd,ums512-eic-latch59 - const: sprd,sc9860-eic-latch60 - items:61 - enum:62 - sprd,ums512-eic-async63 - const: sprd,sc9860-eic-async64 - items:65 - enum:66 - sprd,ums512-eic-sync67 - const: sprd,sc9860-eic-sync68 - items:69 - enum:70 - sprd,sc2730-eic71 - const: sprd,sc2731-eic72 73 reg:74 minItems: 175 maxItems: 376 description:77 EIC controller can support maximum 3 banks which has its own78 address base.79 80 gpio-controller: true81 82 "#gpio-cells":83 const: 284 85 interrupt-controller: true86 87 "#interrupt-cells":88 const: 289 90 interrupts:91 maxItems: 192 description:93 The interrupt shared by all GPIO lines for this controller.94 95required:96 - compatible97 - reg98 - gpio-controller99 - "#gpio-cells"100 - interrupt-controller101 - "#interrupt-cells"102 - interrupts103 104additionalProperties: false105 106examples:107 - |108 #include <dt-bindings/interrupt-controller/arm-gic.h>109 110 soc {111 #address-cells = <2>;112 #size-cells = <2>;113 114 eic_debounce: gpio@40210000 {115 compatible = "sprd,sc9860-eic-debounce";116 reg = <0 0x40210000 0 0x80>;117 gpio-controller;118 #gpio-cells = <2>;119 interrupt-controller;120 #interrupt-cells = <2>;121 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;122 };123 };124...125