48 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: ZynqMP Mode Pin GPIO controller8 9description:10 PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin11 GPIO controller with configurable from numbers of pins (from 0 to 3 per12 PS_MODE). Every pin can be configured as input/output.13 14maintainers:15 - Mubin Sayyed <mubin.sayyed@amd.com>16 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>17 18properties:19 compatible:20 const: xlnx,zynqmp-gpio-modepin21 22 gpio-controller: true23 24 "#gpio-cells":25 const: 226 27 label: true28 29required:30 - compatible31 - gpio-controller32 - "#gpio-cells"33 34additionalProperties: false35 36examples:37 - |38 zynqmp-firmware {39 gpio {40 compatible = "xlnx,zynqmp-gpio-modepin";41 gpio-controller;42 #gpio-cells = <2>;43 label = "modepin";44 };45 };46 47...48