brintos

brintos / linux-shallow public Read only

0
0
Text · 2.1 KiB · 6168b44 Raw
82 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)8 9maintainers:10  - Zhiyong Tao <zhiyong.tao@mediatek.com>11  - Matthias Brugger <matthias.bgg@gmail.com>12 13description: |14  The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found15  in some Mediatek SoCs which among other things measures the temperatures16  in the SoC. It can be used directly with register accesses, but it is also17  used by thermal controller which reads the temperatures from the AUXADC18  directly via its own bus interface. See mediatek-thermal bindings19  for the Thermal Controller which holds a phandle to the AUXADC.20 21properties:22  compatible:23    oneOf:24      - enum:25          - mediatek,mt2701-auxadc26          - mediatek,mt2712-auxadc27          - mediatek,mt6765-auxadc28          - mediatek,mt7622-auxadc29          - mediatek,mt7986-auxadc30          - mediatek,mt8173-auxadc31      - items:32          - enum:33              - mediatek,mt7623-auxadc34          - const: mediatek,mt2701-auxadc35      - items:36          - enum:37              - mediatek,mt8183-auxadc38              - mediatek,mt8186-auxadc39              - mediatek,mt8188-auxadc40              - mediatek,mt8195-auxadc41              - mediatek,mt8516-auxadc42          - const: mediatek,mt8173-auxadc43 44  reg:45    maxItems: 146 47  clocks:48    maxItems: 149 50  clock-names:51    const: main52 53  "#io-channel-cells":54    const: 155 56additionalProperties: false57 58required:59  - compatible60  - reg61  - clocks62  - clock-names63  - "#io-channel-cells"64 65examples:66  - |67    #include <dt-bindings/clock/mt8183-clk.h>68    soc {69        #address-cells = <2>;70        #size-cells = <2>;71 72        adc@11001000 {73            compatible = "mediatek,mt8183-auxadc",74                         "mediatek,mt8173-auxadc";75            reg = <0 0x11001000 0 0x1000>;76            clocks = <&infracfg CLK_INFRA_AUXADC>;77            clock-names = "main";78            #io-channel-cells = <1>;79        };80    };81...82