80 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP iMX93 ADC8 9maintainers:10 - Haibo Chen <haibo.chen@nxp.com>11 12description:13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels14 connected to pins. it support normal and inject mode, include15 One-Shot and Scan (continuous) conversions. Programmable DMA16 enables for each channel Also this ADC contain alternate analog17 watchdog thresholds, select threshold through input ports. And18 also has Self-test logic and Software-initiated calibration.19 20properties:21 compatible:22 const: nxp,imx93-adc23 24 reg:25 maxItems: 126 27 interrupts:28 items:29 - description: WDGnL, watchdog threshold interrupt requests.30 - description: WDGnH, watchdog threshold interrupt requests.31 - description: normal conversion, include EOC (End of Conversion),32 ECH (End of Chain), JEOC (End of Injected Conversion) and33 JECH (End of injected Chain).34 35 clocks:36 maxItems: 137 38 clock-names:39 const: ipg40 41 vref-supply:42 description:43 The reference voltage which used to establish channel scaling.44 45 "#io-channel-cells":46 const: 147 48required:49 - compatible50 - reg51 - interrupts52 - clocks53 - clock-names54 - vref-supply55 - "#io-channel-cells"56 57additionalProperties: false58 59examples:60 - |61 #include <dt-bindings/interrupt-controller/irq.h>62 #include <dt-bindings/clock/imx93-clock.h>63 #include <dt-bindings/interrupt-controller/arm-gic.h>64 soc {65 #address-cells = <1>;66 #size-cells = <1>;67 adc@44530000 {68 compatible = "nxp,imx93-adc";69 reg = <0x44530000 0x10000>;70 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,71 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,72 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;73 clocks = <&clk IMX93_CLK_ADC1_GATE>;74 clock-names = "ipg";75 vref-supply = <®_vref_1v8>;76 #io-channel-cells = <1>;77 };78 };79...80