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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs8 9maintainers:10 - Jonathan Cameron <jic23@kernel.org>11 12description: |13 The ADS131E0x are a family of multichannel, simultaneous sampling,14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a15 built-in programmable gain amplifier (PGA), internal reference16 and an onboard oscillator.17 The communication with ADC chip is via the SPI bus (mode 1).18 19 https://www.ti.com/lit/ds/symlink/ads131e08.pdf20 21properties:22 compatible:23 enum:24 - ti,ads131e0425 - ti,ads131e0626 - ti,ads131e0827 28 reg:29 maxItems: 130 31 spi-cpha: true32 33 clocks:34 description: |35 Device tree identifier to the clock source (2.048 MHz).36 Note: clock source is selected using CLKSEL pin.37 maxItems: 138 39 clock-names:40 items:41 - const: adc-clk42 43 interrupts:44 description: |45 IRQ line for the ADC data ready.46 maxItems: 147 48 vref-supply:49 description: |50 Optional external voltage reference. If not supplied, internal voltage51 reference is used.52 53 ti,vref-internal:54 description: |55 Select the internal voltage reference value.56 0: 2.4V57 1: 4.0V58 If this field is left empty, 2.4V is selected.59 Note: internal voltage reference is used only if vref-supply is not supplied.60 $ref: /schemas/types.yaml#/definitions/uint3261 enum: [0, 1]62 default: 063 64 '#address-cells':65 const: 166 67 '#size-cells':68 const: 069 70required:71 - compatible72 - reg73 - spi-cpha74 - clocks75 - clock-names76 - interrupts77 78patternProperties:79 "^channel@([0-7])$":80 $ref: adc.yaml81 type: object82 description: |83 Represents the external channels which are connected to the ADC.84 85 properties:86 reg:87 description: |88 The channel number.89 Up to 4 channels, numbered from 0 to 3 for ti,ads131e04.90 Up to 6 channels, numbered from 0 to 5 for ti,ads131e06.91 Up to 8 channels, numbered from 0 to 7 for ti,ads131e08.92 items:93 minimum: 094 maximum: 795 96 ti,gain:97 description: |98 The PGA gain value for the channel.99 If this field is left empty, PGA gain 1 is used.100 $ref: /schemas/types.yaml#/definitions/uint32101 enum: [1, 2, 4, 8, 12]102 default: 1103 104 ti,mux:105 description: |106 Channel input selection(muliplexer).107 0: Normal input.108 1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements).109 3: MVDD (for supply measurement)110 4: Temperature sensor111 If this field is left empty, normal input is selected.112 $ref: /schemas/types.yaml#/definitions/uint32113 enum: [0, 1, 3, 4]114 default: 0115 116 required:117 - reg118 119 additionalProperties: false120 121allOf:122 - $ref: /schemas/spi/spi-peripheral-props.yaml#123 124unevaluatedProperties: false125 126examples:127 - |128 #include <dt-bindings/interrupt-controller/irq.h>129 130 spi {131 #address-cells = <1>;132 #size-cells = <0>;133 134 adc@0 {135 compatible = "ti,ads131e08";136 reg = <0>;137 spi-max-frequency = <1000000>;138 spi-cpha;139 clocks = <&clk2048k>;140 clock-names = "adc-clk";141 interrupt-parent = <&gpio5>;142 interrupts = <28 IRQ_TYPE_EDGE_FALLING>;143 vref-supply = <&adc_vref>;144 145 #address-cells = <1>;146 #size-cells = <0>;147 148 channel@0 {149 reg = <0>;150 };151 152 channel@1 {153 reg = <1>;154 };155 156 channel@2 {157 reg = <2>;158 ti,gain = <2>;159 };160 161 channel@3 {162 reg = <3>;163 };164 165 channel@4 {166 reg = <4>;167 };168 169 channel@5 {170 reg = <5>;171 };172 173 channel@6 {174 reg = <6>;175 };176 177 channel@7 {178 reg = <7>;179 ti,mux = <4>;180 };181 };182 };183