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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers8 9maintainers:10 - Popa Stefan <stefan.popa@analog.com>11 12description: |13 Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers14 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf15 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf16 17properties:18 compatible:19 enum:20 - adi,adf437121 - adi,adf437222 23 reg:24 maxItems: 125 26 clocks:27 description:28 Definition of the external clock (see clock/clock-bindings.txt)29 maxItems: 130 31 clock-names:32 description:33 Must be "clkin"34 maxItems: 135 36 adi,mute-till-lock-en:37 type: boolean38 description:39 If this property is present, then the supply current to RF8P and RF8N40 output stage will shut down until the ADF4371/ADF4372 achieves lock as41 measured by the digital lock detect circuitry.42 43required:44 - compatible45 - reg46 - clocks47 - clock-names48 49allOf:50 - $ref: /schemas/spi/spi-peripheral-props.yaml#51 52unevaluatedProperties: false53 54examples:55 - |56 spi {57 #address-cells = <1>;58 #size-cells = <0>;59 60 frequency@0 {61 compatible = "adi,adf4371";62 reg = <0>;63 spi-max-frequency = <1000000>;64 clocks = <&adf4371_clkin>;65 clock-names = "clkin";66 };67 };68...69