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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm RPMh Network-On-Chip Interconnect on SM84508 9maintainers:10 - Bjorn Andersson <andersson@kernel.org>11 - Konrad Dybcio <konradybcio@kernel.org>12 13description: |14 RPMh interconnect providers support system bandwidth requirements through15 RPMh hardware accelerators known as Bus Clock Manager (BCM).16 17 See also:: include/dt-bindings/interconnect/qcom,sm8450.h18 19properties:20 compatible:21 enum:22 - qcom,sm8450-aggre1-noc23 - qcom,sm8450-aggre2-noc24 - qcom,sm8450-clk-virt25 - qcom,sm8450-config-noc26 - qcom,sm8450-gem-noc27 - qcom,sm8450-lpass-ag-noc28 - qcom,sm8450-mc-virt29 - qcom,sm8450-mmss-noc30 - qcom,sm8450-nsp-noc31 - qcom,sm8450-pcie-anoc32 - qcom,sm8450-system-noc33 34 reg:35 maxItems: 136 37 clocks:38 minItems: 139 maxItems: 440 41required:42 - compatible43 44allOf:45 - $ref: qcom,rpmh-common.yaml#46 - if:47 properties:48 compatible:49 contains:50 enum:51 - qcom,sm8450-clk-virt52 - qcom,sm8450-mc-virt53 then:54 properties:55 reg: false56 else:57 required:58 - reg59 60 - if:61 properties:62 compatible:63 contains:64 enum:65 - qcom,sm8450-aggre1-noc66 then:67 properties:68 clocks:69 items:70 - description: aggre UFS PHY AXI clock71 - description: aggre USB3 PRIM AXI clock72 73 - if:74 properties:75 compatible:76 contains:77 enum:78 - qcom,sm8450-aggre2-noc79 then:80 properties:81 clocks:82 items:83 - description: aggre-NOC PCIe 0 AXI clock84 - description: aggre-NOC PCIe 1 AXI clock85 - description: aggre UFS PHY AXI clock86 - description: RPMH CC IPA clock87 88 - if:89 properties:90 compatible:91 contains:92 enum:93 - qcom,sm8450-aggre1-noc94 - qcom,sm8450-aggre2-noc95 then:96 required:97 - clocks98 else:99 properties:100 clocks: false101 102unevaluatedProperties: false103 104examples:105 - |106 #include <dt-bindings/clock/qcom,gcc-sm8450.h>107 #include <dt-bindings/clock/qcom,rpmh.h>108 109 interconnect-0 {110 compatible = "qcom,sm8450-clk-virt";111 #interconnect-cells = <2>;112 qcom,bcm-voters = <&apps_bcm_voter>;113 };114 115 interconnect@1700000 {116 compatible = "qcom,sm8450-aggre2-noc";117 reg = <0x01700000 0x31080>;118 #interconnect-cells = <2>;119 qcom,bcm-voters = <&apps_bcm_voter>;120 clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,121 <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,122 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,123 <&rpmhcc RPMH_IPA_CLK>;124 };125