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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/interrupt-controller/amlogic,meson-gpio-intc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Amlogic Meson GPIO interrupt controller8 9maintainers:10 - Heiner Kallweit <hkallweit1@gmail.com>11 12description: |13 Meson SoCs contains an interrupt controller which is able to watch the SoC14 pads and generate an interrupt on edge or level. The controller is essentially15 a 256 pads to 8 or 12 GIC interrupt multiplexer, with a filter block to select16 edge or level and polarity. It does not expose all 256 mux inputs because the17 documentation shows that the upper part is not mapped to any pad. The actual18 number of interrupts exposed depends on the SoC.19 20allOf:21 - $ref: /schemas/interrupt-controller.yaml#22 23properties:24 compatible:25 oneOf:26 - const: amlogic,meson-gpio-intc27 - items:28 - enum:29 - amlogic,meson8-gpio-intc30 - amlogic,meson8b-gpio-intc31 - amlogic,meson-gxbb-gpio-intc32 - amlogic,meson-gxl-gpio-intc33 - amlogic,meson-axg-gpio-intc34 - amlogic,meson-g12a-gpio-intc35 - amlogic,meson-sm1-gpio-intc36 - amlogic,meson-a1-gpio-intc37 - amlogic,meson-s4-gpio-intc38 - amlogic,c3-gpio-intc39 - amlogic,t7-gpio-intc40 - const: amlogic,meson-gpio-intc41 42 reg:43 maxItems: 144 45 interrupt-controller: true46 47 "#interrupt-cells":48 const: 249 50 amlogic,channel-interrupts:51 description: Array with the upstream hwirq numbers52 minItems: 853 maxItems: 1254 $ref: /schemas/types.yaml#/definitions/uint32-array55 56required:57 - compatible58 - reg59 - interrupt-controller60 - "#interrupt-cells"61 - amlogic,channel-interrupts62 63additionalProperties: false64 65examples:66 - |67 interrupt-controller@9880 {68 compatible = "amlogic,meson-gxbb-gpio-intc",69 "amlogic,meson-gpio-intc";70 reg = <0x9880 0x10>;71 interrupt-controller;72 #interrupt-cells = <2>;73 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;74 };75