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1J-Core Advanced Interrupt Controller2 3Required properties:4 5- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic6 with 8 interrupt lines with programmable priorities, or "jcore,aic2" for7 the "aic2" core with 64 interrupts.8 9- reg: Memory region(s) for configuration. For SMP, there should be one10 region per cpu, indexed by the sequential, zero-based hardware cpu11 number.12 13- interrupt-controller: Identifies the node as an interrupt controller14 15- #interrupt-cells: Specifies the number of cells needed to encode an16 interrupt source. The value shall be 1.17 18 19Example:20 21aic: interrupt-controller@200 {22 compatible = "jcore,aic2";23 reg = < 0x200 0x30 0x500 0x30 >;24 interrupt-controller;25 #interrupt-cells = <1>;26};27