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1* Open PIC Binding2 3This binding specifies what properties must be available in the device tree4representation of an Open PIC compliant interrupt controller. This binding is5based on the binding defined for Open PIC in [1] and is a superset of that6binding.7 8Required properties:9 10 NOTE: Many of these descriptions were paraphrased here from [1] to aid11 readability.12 13 - compatible: Specifies the compatibility list for the PIC. The type14 shall be <string> and the value shall include "open-pic".15 16 - reg: Specifies the base physical address(s) and size(s) of this17 PIC's addressable register space. The type shall be <prop-encoded-array>.18 19 - interrupt-controller: The presence of this property identifies the node20 as an Open PIC. No property value shall be defined.21 22 - #interrupt-cells: Specifies the number of cells needed to encode an23 interrupt source. The type shall be a <u32> and the value shall be 2.24 25 - #address-cells: Specifies the number of cells needed to encode an26 address. The type shall be <u32> and the value shall be 0. As such,27 'interrupt-map' nodes do not have to specify a parent unit address.28 29Optional properties:30 31 - pic-no-reset: The presence of this property indicates that the PIC32 shall not be reset during runtime initialization. No property value shall33 be defined. The presence of this property also mandates that any34 initialization related to interrupt sources shall be limited to sources35 explicitly referenced in the device tree.36 37* Interrupt Specifier Definition38 39 Interrupt specifiers consists of 2 cells encoded as40 follows:41 42 - <1st-cell>: The interrupt-number that identifies the interrupt source.43 44 - <2nd-cell>: The level-sense information, encoded as follows:45 0 = low-to-high edge triggered46 1 = active low level-sensitive47 2 = active high level-sensitive48 3 = high-to-low edge triggered49 50* Examples51 52Example 1:53 54 /*55 * An Open PIC interrupt controller56 */57 mpic: pic@40000 {58 // This is an interrupt controller node.59 interrupt-controller;60 61 // No address cells so that 'interrupt-map' nodes which reference62 // this Open PIC node do not need a parent address specifier.63 #address-cells = <0>;64 65 // Two cells to encode interrupt sources.66 #interrupt-cells = <2>;67 68 // Offset address of 0x40000 and size of 0x40000.69 reg = <0x40000 0x40000>;70 71 // Compatible with Open PIC.72 compatible = "open-pic";73 74 // The PIC shall not be reset.75 pic-no-reset;76 };77 78Example 2:79 80 /*81 * An interrupt generating device that is wired to an Open PIC.82 */83 serial0: serial@4500 {84 // Interrupt source '42' that is active high level-sensitive.85 // Note that there are only two cells as specified in the interrupt86 // parent's '#interrupt-cells' property.87 interrupts = <42 2>;88 89 // The interrupt controller that this device is wired to.90 interrupt-parent = <&mpic>;91 };92 93* References94 95[1] Devicetree Specification96 (https://www.devicetree.org/specifications/)97 98