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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: R-Mobile/R-Car/RZ/G interrupt controller8 9maintainers:10 - Geert Uytterhoeven <geert+renesas@glider.be>11 12properties:13 compatible:14 items:15 - enum:16 - renesas,irqc-r8a73a4 # R-Mobile APE617 - renesas,irqc-r8a7742 # RZ/G1H18 - renesas,irqc-r8a7743 # RZ/G1M19 - renesas,irqc-r8a7744 # RZ/G1N20 - renesas,irqc-r8a7745 # RZ/G1E21 - renesas,irqc-r8a77470 # RZ/G1C22 - renesas,irqc-r8a7790 # R-Car H223 - renesas,irqc-r8a7791 # R-Car M2-W24 - renesas,irqc-r8a7792 # R-Car V2H25 - renesas,irqc-r8a7793 # R-Car M2-N26 - renesas,irqc-r8a7794 # R-Car E227 - renesas,intc-ex-r8a774a1 # RZ/G2M28 - renesas,intc-ex-r8a774b1 # RZ/G2N29 - renesas,intc-ex-r8a774c0 # RZ/G2E30 - renesas,intc-ex-r8a774e1 # RZ/G2H31 - renesas,intc-ex-r8a7795 # R-Car H332 - renesas,intc-ex-r8a7796 # R-Car M3-W33 - renesas,intc-ex-r8a77961 # R-Car M3-W+34 - renesas,intc-ex-r8a77965 # R-Car M3-N35 - renesas,intc-ex-r8a77970 # R-Car V3M36 - renesas,intc-ex-r8a77980 # R-Car V3H37 - renesas,intc-ex-r8a77990 # R-Car E338 - renesas,intc-ex-r8a77995 # R-Car D339 - renesas,intc-ex-r8a779a0 # R-Car V3U40 - renesas,intc-ex-r8a779f0 # R-Car S4-841 - renesas,intc-ex-r8a779g0 # R-Car V4H42 - renesas,intc-ex-r8a779h0 # R-Car V4M43 - const: renesas,irqc44 45 '#interrupt-cells':46 # an interrupt index and flags, as defined in interrupts.txt in47 # this directory48 const: 249 50 interrupt-controller: true51 52 reg:53 maxItems: 154 55 interrupts:56 minItems: 157 maxItems: 3258 59 clocks:60 maxItems: 161 62 power-domains:63 maxItems: 164 65 resets:66 maxItems: 167 68required:69 - compatible70 - '#interrupt-cells'71 - interrupt-controller72 - reg73 - interrupts74 - clocks75 76additionalProperties: false77 78examples:79 - |80 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>81 #include <dt-bindings/interrupt-controller/arm-gic.h>82 #include <dt-bindings/interrupt-controller/irq.h>83 84 irqc0: interrupt-controller@e61c0000 {85 compatible = "renesas,irqc-r8a7790", "renesas,irqc";86 #interrupt-cells = <2>;87 interrupt-controller;88 reg = <0xe61c0000 0x200>;89 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,90 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,91 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,92 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;93 clocks = <&cpg CPG_MOD 407>;94 };95