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1* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)2 3Properties:4 5- compatible: "snps,archs-intc"6- interrupt-controller: This is an interrupt controller.7- #interrupt-cells: Must be <1>.8 9 Single Cell "interrupts" property of a device specifies the IRQ number10 between 16 to 25611 12 intc accessed via the special ARC AUX register interface, hence "reg" property13 is not specified.14 15Example:16 17 intc: interrupt-controller {18 compatible = "snps,archs-intc";19 interrupt-controller;20 #interrupt-cells = <1>;21 interrupts = <16 17 18 19 20 21 22 23 24 25>;22 };23