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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-intc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: StarFive External Interrupt Controller8 9description:10 StarFive SoC JH8100 contain a external interrupt controller. It can be used11 to handle high-level input interrupt signals. It also send the output12 interrupt signal to RISC-V PLIC.13 14maintainers:15 - Changhuang Liang <changhuang.liang@starfivetech.com>16 17properties:18 compatible:19 const: starfive,jh8100-intc20 21 reg:22 maxItems: 123 24 clocks:25 description: APB clock for the interrupt controller26 maxItems: 127 28 resets:29 description: APB reset for the interrupt controller30 maxItems: 131 32 interrupts:33 maxItems: 134 35 interrupt-controller: true36 37 "#interrupt-cells":38 const: 139 40required:41 - compatible42 - reg43 - clocks44 - resets45 - interrupts46 - interrupt-controller47 - "#interrupt-cells"48 49additionalProperties: false50 51examples:52 - |53 interrupt-controller@12260000 {54 compatible = "starfive,jh8100-intc";55 reg = <0x12260000 0x10000>;56 clocks = <&syscrg_ne 76>;57 resets = <&syscrg_ne 13>;58 interrupts = <45>;59 interrupt-controller;60 #interrupt-cells = <1>;61 };62