67 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner H6 IOMMU8 9maintainers:10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>12 13properties:14 "#iommu-cells":15 const: 116 description:17 The content of the cell is the master ID.18 19 compatible:20 oneOf:21 - const: allwinner,sun50i-h6-iommu22 - const: allwinner,sun50i-h616-iommu23 - items:24 - const: allwinner,sun55i-a523-iommu25 - const: allwinner,sun50i-h616-iommu26 27 reg:28 maxItems: 129 30 interrupts:31 maxItems: 132 33 clocks:34 maxItems: 135 36 resets:37 maxItems: 138 39required:40 - "#iommu-cells"41 - compatible42 - reg43 - interrupts44 - clocks45 - resets46 47additionalProperties: false48 49examples:50 - |51 #include <dt-bindings/interrupt-controller/arm-gic.h>52 #include <dt-bindings/interrupt-controller/irq.h>53 54 #include <dt-bindings/clock/sun50i-h6-ccu.h>55 #include <dt-bindings/reset/sun50i-h6-ccu.h>56 57 iommu: iommu@30f0000 {58 compatible = "allwinner,sun50i-h6-iommu";59 reg = <0x030f0000 0x10000>;60 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;61 clocks = <&ccu CLK_BUS_IOMMU>;62 resets = <&ccu RST_BUS_IOMMU>;63 #iommu-cells = <1>;64 };65 66...67