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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/iommu/samsung,sysmmu.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)8 9maintainers:10 - Marek Szyprowski <m.szyprowski@samsung.com>11 12description: |+13 Samsung's Exynos architecture contains System MMUs that enables scattered14 physical memory chunks visible as a contiguous region to DMA-capable peripheral15 devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.16 17 System MMU is an IOMMU and supports identical translation table format to18 ARMv7 translation tables with minimum set of page properties including access19 permissions, shareability and security protection. In addition, System MMU has20 another capabilities like L2 TLB or block-fetch buffers to minimize translation21 latency.22 23 System MMUs are in many to one relation with peripheral devices, i.e. single24 peripheral device might have multiple System MMUs (usually one for each bus25 master), but one System MMU can handle transactions from only one peripheral26 device. The relation between a System MMU and the peripheral device needs to be27 defined in device node of the peripheral device.28 29 MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System30 MMUs.31 * MFC has one System MMU on its left and right bus.32 * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU33 for window 1, 2 and 3.34 * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and35 the other System MMU on the write channel.36 37 For information on assigning System MMU controller to its peripheral devices,38 see generic IOMMU bindings.39 40properties:41 compatible:42 const: samsung,exynos-sysmmu43 44 reg:45 maxItems: 146 47 interrupts:48 maxItems: 149 50 clocks:51 minItems: 152 maxItems: 253 54 clock-names:55 oneOf:56 - items:57 - const: sysmmu58 - items:59 - const: sysmmu60 - const: master61 - items:62 - const: aclk63 - const: pclk64 65 "#iommu-cells":66 const: 067 68 power-domains:69 description: |70 Required if the System MMU is needed to gate its power.71 Please refer to the following document:72 Documentation/devicetree/bindings/power/pd-samsung.yaml73 maxItems: 174 75required:76 - compatible77 - reg78 - interrupts79 - clocks80 - clock-names81 - "#iommu-cells"82 83additionalProperties: false84 85examples:86 - |87 #include <dt-bindings/clock/exynos5250.h>88 89 sysmmu_gsc0: iommu@13e80000 {90 compatible = "samsung,exynos-sysmmu";91 reg = <0x13E80000 0x1000>;92 interrupt-parent = <&combiner>;93 interrupts = <2 0>;94 clock-names = "sysmmu", "master";95 clocks = <&clock CLK_SMMU_GSCL0>,96 <&clock CLK_GSCL0>;97 power-domains = <&pd_gsc>;98 #iommu-cells = <0>;99 };100