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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner sunxi Message Box8 9maintainers:10 - Samuel Holland <samuel@sholland.org>11 12description: |13 The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a14 two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt15 is raised for received messages, but software must poll to know when a16 transmitted message has been acknowledged by the remote user. Each FIFO can17 hold four 32-bit messages; when a FIFO is full, clients must wait before18 attempting more transmissions.19 20 Refer to ./mailbox.txt for generic information about mailbox device-tree21 bindings.22 23properties:24 compatible:25 oneOf:26 - items:27 - enum:28 - allwinner,sun8i-a83t-msgbox29 - allwinner,sun8i-h3-msgbox30 - allwinner,sun9i-a80-msgbox31 - allwinner,sun50i-a64-msgbox32 - allwinner,sun50i-h6-msgbox33 - const: allwinner,sun6i-a31-msgbox34 - const: allwinner,sun6i-a31-msgbox35 36 reg:37 maxItems: 138 39 clocks:40 maxItems: 141 description: bus clock42 43 resets:44 maxItems: 145 description: bus reset46 47 interrupts:48 maxItems: 149 50 '#mbox-cells':51 const: 152 description: first cell is the channel number (0-7)53 54required:55 - compatible56 - reg57 - clocks58 - resets59 - interrupts60 - '#mbox-cells'61 62additionalProperties: false63 64examples:65 - |66 #include <dt-bindings/clock/sun8i-h3-ccu.h>67 #include <dt-bindings/interrupt-controller/arm-gic.h>68 #include <dt-bindings/reset/sun8i-h3-ccu.h>69 70 msgbox: mailbox@1c17000 {71 compatible = "allwinner,sun8i-h3-msgbox",72 "allwinner,sun6i-a31-msgbox";73 reg = <0x01c17000 0x1000>;74 clocks = <&ccu CLK_BUS_MSGBOX>;75 resets = <&ccu RST_BUS_MSGBOX>;76 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;77 #mbox-cells = <1>;78 };79 80...81