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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13description: |14 The HSP modules are used for the processors to share resources and15 communicate together. It provides a set of hardware synchronization16 primitives for interprocessor communication. So the interprocessor17 communication (IPC) protocols can use hardware synchronization18 primitives, when operating between two processors not in an SMP19 relationship.20 21 The features that HSP supported are shared mailboxes, shared22 semaphores, arbitrated semaphores and doorbells.23 24 The mbox specifier of the "mboxes" property in the client node should25 contain two cells. The first cell determines the HSP type and the26 second cell is used to identify the mailbox that the client is going27 to use.28 29 For shared mailboxes, the first cell composed of two fields:30 - bits 15..8:31 A bit mask of flags that further specifies the type of shared32 mailbox to be used (based on the data size). If no flag is33 specified then, 32-bit shared mailbox is used.34 - bits 7..0:35 Defines the type of the mailbox to be used. This field should be36 TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.37 38 For doorbells, the second cell specifies the index of the doorbell to39 use.40 41 For shared mailboxes, the second cell is composed of two fields:42 - bits 31..24:43 A bit mask of flags that further specify how the shared mailbox44 will be used. Valid flags are:45 - bit 31:46 Defines the direction of the mailbox. If set, the mailbox47 will be used as a producer (i.e. used to send data). If48 cleared, the mailbox is the consumer of data sent by a49 producer.50 51 - bits 23..0:52 The index of the shared mailbox to use. The number of available53 mailboxes may vary by instance of the HSP block and SoC54 generation.55 56 The following file contains definitions that can be used to57 construct mailbox specifiers:58 59 <dt-bindings/mailbox/tegra186-hsp.h>60 61properties:62 $nodename:63 pattern: "^hsp@[0-9a-f]+$"64 65 compatible:66 oneOf:67 - const: nvidia,tegra186-hsp68 - const: nvidia,tegra194-hsp69 - const: nvidia,tegra264-hsp70 - items:71 - const: nvidia,tegra234-hsp72 - const: nvidia,tegra194-hsp73 74 reg:75 maxItems: 176 77 interrupts:78 minItems: 179 maxItems: 980 81 interrupt-names:82 oneOf:83 # shared interrupts are optional84 - items:85 - const: doorbell86 87 - items:88 - const: doorbell89 - pattern: "^shared[0-7]$"90 - pattern: "^shared[0-7]$"91 - pattern: "^shared[0-7]$"92 - pattern: "^shared[0-7]$"93 - pattern: "^shared[0-7]$"94 - pattern: "^shared[0-7]$"95 - pattern: "^shared[0-7]$"96 - pattern: "^shared[0-7]$"97 98 - items:99 - pattern: "^shared[0-7]$"100 - pattern: "^shared[0-7]$"101 - pattern: "^shared[0-7]$"102 - pattern: "^shared[0-7]$"103 104 "#mbox-cells":105 const: 2106 107additionalProperties: false108 109examples:110 - |111 #include <dt-bindings/interrupt-controller/arm-gic.h>112 #include <dt-bindings/mailbox/tegra186-hsp.h>113 114 hsp_top0: hsp@3c00000 {115 compatible = "nvidia,tegra186-hsp";116 reg = <0x03c00000 0xa0000>;117 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;118 interrupt-names = "doorbell";119 #mbox-cells = <2>;120 };121 122 client {123 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_CCPLEX>;124 };125