brintos

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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A31 MIPI CSI-28 9maintainers:10  - Paul Kocialkowski <paul.kocialkowski@bootlin.com>11 12properties:13  compatible:14    oneOf:15      - const: allwinner,sun6i-a31-mipi-csi216      - items:17          - const: allwinner,sun8i-v3s-mipi-csi218          - const: allwinner,sun6i-a31-mipi-csi219 20  reg:21    maxItems: 122 23  interrupts:24    maxItems: 125 26  clocks:27    items:28      - description: Bus Clock29      - description: Module Clock30 31  clock-names:32    items:33      - const: bus34      - const: mod35 36  phys:37    maxItems: 138    description: MIPI D-PHY39 40  phy-names:41    items:42      - const: dphy43 44  resets:45    maxItems: 146 47  ports:48    $ref: /schemas/graph.yaml#/properties/ports49 50    properties:51      port@0:52        $ref: /schemas/graph.yaml#/$defs/port-base53        description: Input port, connect to a MIPI CSI-2 sensor54 55        properties:56          reg:57            const: 058 59          endpoint:60            $ref: video-interfaces.yaml#61            unevaluatedProperties: false62 63            properties:64              data-lanes:65                minItems: 166                maxItems: 467 68            required:69              - data-lanes70 71        unevaluatedProperties: false72 73      port@1:74        $ref: /schemas/graph.yaml#/properties/port75        description: Output port, connect to a CSI controller76 77    required:78      - port@079      - port@180 81required:82  - compatible83  - reg84  - interrupts85  - clocks86  - clock-names87  - phys88  - phy-names89  - resets90  - ports91 92additionalProperties: false93 94examples:95  - |96    #include <dt-bindings/interrupt-controller/arm-gic.h>97    #include <dt-bindings/clock/sun8i-v3s-ccu.h>98    #include <dt-bindings/reset/sun8i-v3s-ccu.h>99 100    mipi_csi2: csi@1cb1000 {101        compatible = "allwinner,sun8i-v3s-mipi-csi2",102                     "allwinner,sun6i-a31-mipi-csi2";103        reg = <0x01cb1000 0x1000>;104        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;105        clocks = <&ccu CLK_BUS_CSI>,106                 <&ccu CLK_CSI1_SCLK>;107        clock-names = "bus", "mod";108        resets = <&ccu RST_BUS_CSI>;109 110        phys = <&dphy>;111        phy-names = "dphy";112 113        ports {114            #address-cells = <1>;115            #size-cells = <0>;116 117            mipi_csi2_in: port@0 {118                reg = <0>;119 120                mipi_csi2_in_ov5648: endpoint {121                    data-lanes = <1 2 3 4>;122 123                    remote-endpoint = <&ov5648_out_mipi_csi2>;124                };125            };126 127            mipi_csi2_out: port@1 {128                reg = <1>;129 130                mipi_csi2_out_csi0: endpoint {131                    remote-endpoint = <&csi0_in_mipi_csi2>;132                };133            };134        };135    };136 137...138