brintos / linux-shallow public Read only

1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/media/i2c/aptina,mt9p031.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor8 9maintainers:10  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>11 12description: |13  The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor14  with an active array size of 2592H x 1944V. It is programmable through a15  simple two-wire serial interface.16 17properties:18  compatible:19    enum:20      - aptina,mt9p00621      - aptina,mt9p03122      - aptina,mt9p031m23 24  reg:25    description: I2C device address26    maxItems: 127 28  clocks:29    maxItems: 130 31  vdd-supply:32    description: Digital supply voltage, 1.8 V33 34  vdd_io-supply:35    description: I/O supply voltage, 1.8 or 2.8 V36 37  vaa-supply:38    description: Analog supply voltage, 2.8 V39 40  reset-gpios:41    maxItems: 142    description: Chip reset GPIO43 44  port:45    $ref: /schemas/graph.yaml#/$defs/port-base46    additionalProperties: false47 48    properties:49      endpoint:50        $ref: /schemas/media/video-interfaces.yaml#51        unevaluatedProperties: false52 53        properties:54          input-clock-frequency:55            $ref: /schemas/types.yaml#/definitions/uint3256            minimum: 600000057            maximum: 9600000058            description: Input clock frequency59 60          pixel-clock-frequency:61            $ref: /schemas/types.yaml#/definitions/uint3262            maximum: 9600000063            description: Target pixel clock frequency64 65          pclk-sample:66            default: 067 68        required:69          - input-clock-frequency70          - pixel-clock-frequency71 72required:73  - compatible74  - reg75  - clocks76  - vdd-supply77  - vdd_io-supply78  - vaa-supply79  - port80 81additionalProperties: false82 83examples:84  - |85    i2c {86        #address-cells = <1>;87        #size-cells = <0>;88 89        mt9p031@5d {90            compatible = "aptina,mt9p031";91            reg = <0x5d>;92            reset-gpios = <&gpio_sensor 0 0>;93 94            clocks = <&sensor_clk>;95 96            vdd-supply = <&reg_vdd>;97            vdd_io-supply = <&reg_vdd_io>;98            vaa-supply = <&reg_vaa>;99 100            port {101                mt9p031_1: endpoint {102                    input-clock-frequency = <6000000>;103                    pixel-clock-frequency = <96000000>;104                };105            };106        };107    };108 109...110